diff options
| author |  xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2012-07-10 09:00:24 +0000 |
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| committer | xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2012-07-10 09:00:24 +0000 |
| commit | 9e76f90bc5255d6ec933d705bf99baf3ca80d5d5 (patch) | |
| tree | 4f479cbabeab8dae4b3c4419d6ecafd64976f60d /arm/PrintAsm.ml | |
| parent | 39fefdbe35d14d063e71738a70deebbae896eb06 (diff) | |
Updated ARM port.
CSE.v: removed commented-out stuff.
git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@1966 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
Diffstat (limited to 'arm/PrintAsm.ml')
| -rw-r--r-- | arm/PrintAsm.ml | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/arm/PrintAsm.ml b/arm/PrintAsm.ml index 86fdf0e..36becdc 100644 --- a/arm/PrintAsm.ml +++ b/arm/PrintAsm.ml @@ -400,20 +400,20 @@ let print_builtin_inline oc name args res = | "__builtin_fsqrt", [FR a1], FR res -> fprintf oc " fsqrtd %a, %a\n" freg res freg a1; 1 (* Memory accesses *) - | "__builtin_read_int16_reversed", [IR a1], IR res -> + | "__builtin_read16_reversed", [IR a1], IR res -> fprintf oc " ldrh %a, [%a, #0]\n" ireg res ireg a1; fprintf oc " mov %a, %a, lsl #8\n" ireg IR14 ireg res; fprintf oc " and %a, %a, #0xFF00\n" ireg IR14 ireg IR14; fprintf oc " orr %a, %a, %a, lsr #8\n" ireg res ireg IR14 ireg res; 4 - | "__builtin_read_int32_reversed", [IR a1], IR res -> + | "__builtin_read32_reversed", [IR a1], IR res -> fprintf oc " ldr %a, [%a, #0]\n" ireg res ireg a1; print_bswap oc res IR14 res; 5 - | "__builtin_write_int16_reversed", [IR a1; IR a2], _ -> + | "__builtin_write16_reversed", [IR a1; IR a2], _ -> fprintf oc " mov %a, %a, lsr #8\n" ireg IR14 ireg a2; fprintf oc " and %a, %a, #0xFF\n" ireg IR14 ireg IR14; fprintf oc " orr %a, %a, %a, lsl #8\n" ireg IR14 ireg IR14 ireg a2; fprintf oc " strh %a, [%a, #0]\n" ireg IR14 ireg a1; 4 - | "__builtin_write_int32_reversed", [IR a1; IR a2], _ -> + | "__builtin_write32_reversed", [IR a1; IR a2], _ -> let tmp = if a1 = IR10 then IR12 else IR10 in print_bswap oc a2 IR14 tmp; fprintf oc " str %a, [%a, #0]\n" ireg tmp ireg a1; 5 @@ -671,6 +671,12 @@ let rec print_instructions oc instrs = end; print_instructions oc il +(* Base-2 log of a Caml integer *) + +let rec log2 n = + assert (n > 0); + if n = 1 then 0 else 1 + log2 (n lsr 1) + let print_function oc name fn = Hashtbl.clear current_function_labels; reset_constants(); @@ -728,12 +734,6 @@ let print_init_data oc name id = else List.iter (print_init oc) id -(* Base-2 log of a Caml integer *) - -let rec log2 n = - assert (n > 0); - if n = 1 then 0 else 1 + log2 (n lsr 1) - let print_var oc (name, v) = match v.gvar_init with | [] -> () |