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authorGravatar xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>2010-05-05 14:00:09 +0000
committerGravatar xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>2010-05-05 14:00:09 +0000
commit74d5c69e69e3832e02286b88c27bb2d3d562791c (patch)
tree8aabc573ca5b0bc617f922d2f737bb407a5aaacf
parentce0892a2a279c2cf5777b630810749dcc85b6a6e (diff)
Update
git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@1336 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
-rw-r--r--Changelog25
1 files changed, 24 insertions, 1 deletions
diff --git a/Changelog b/Changelog
index f6b65cc..81b2ff1 100644
--- a/Changelog
+++ b/Changelog
@@ -1,3 +1,27 @@
+Release 1.8
+===========
+
+- Added "fabs" (floating-point absolute value) unary operator to Clight;
+ map __builtin_fabs() to this operator.
+
+- Introduced __builtin_memcpy() and __builtin_memcpy_words, use them
+ instead of memcpy() to compile struct and union assignments.
+
+- Better instruction selection for "globvar[expr + cst]" memory accesses.
+
+- Elimination of some useless casts around "&", "|" and "^" bitwise operators.
+
+- Produce fewer "moves" during RTL generation. This speeds up the
+ rest of compilation and slightly improves the result of register
+ allocation when register pressure is high.
+
+- Implemented a spilling heuristic during register allocation.
+ This heuristic reduces significantly the amount of spill code
+ generated when register pressure is high.
+
+- Implemented aggressive coalescing between pairs of spilled variables.
+
+
Release 1.7.1, 2010-04-13
=========================
@@ -190,7 +214,6 @@ Release 1.3, 2008-08-11
- More benchmark programs in test/
-
Release 1.2, 2008-04-03
=======================