diff options
| author |  xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2014-01-01 17:54:52 +0000 |
|---|---|---|
| committer | xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2014-01-01 17:54:52 +0000 |
| commit | 7135f93c41413ed750ad8d2660541c95b37003b5 (patch) | |
| tree | 624287167bd56be14f05bf4bbb53dc80e4b03c56 | |
| parent | 25c616a17851ae5c61fa15ccbeba0e3efb8f3365 (diff) | |
stdarg.h: assorted fixes for PowerPC
git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2397 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
| -rw-r--r-- | powerpc/PrintAsm.ml | 5 | ||||
| -rw-r--r-- | runtime/powerpc/vararg.s | 10 |
2 files changed, 8 insertions, 7 deletions
diff --git a/powerpc/PrintAsm.ml b/powerpc/PrintAsm.ml index 310a733..6d0b52c 100644 --- a/powerpc/PrintAsm.ml +++ b/powerpc/PrintAsm.ml @@ -535,7 +535,8 @@ let print_builtin_va_start oc r = fprintf oc " li %a, %d\n" ireg GPR0 fr; fprintf oc " stb %a, 1(%a)\n" ireg GPR0 ireg r; fprintf oc " addi %a, %a, %ld\n" ireg GPR0 ireg GPR1 - Int32.(add !current_function_stacksize 8l); + Int32.(add (add !current_function_stacksize 8l) + (of_int ofs)); fprintf oc " stw %a, 4(%a)\n" ireg GPR0 ireg r; fprintf oc " addi %a, %a, %ld\n" ireg GPR0 ireg GPR1 Int32.(sub !current_function_stacksize 96l); @@ -709,7 +710,7 @@ let print_instruction oc tbl pc fallthrough = function cfi_adjust oc sz; if (!current_function_sig).sig_cc.cc_vararg then begin fprintf oc " mflr %a\n" ireg GPR0; - fprintf oc " blr __compcert_va_saveregs\n"; + fprintf oc " bl __compcert_va_saveregs\n"; fprintf oc " mtlr %a\n" ireg GPR0 end; current_function_stacksize := sz diff --git a/runtime/powerpc/vararg.s b/runtime/powerpc/vararg.s index 2b36d61..16681c1 100644 --- a/runtime/powerpc/vararg.s +++ b/runtime/powerpc/vararg.s @@ -60,15 +60,15 @@ __compcert_va_int32: # Next argument was passed in an integer register lwz r5, 8(r3) # r5 = ap->regs = base of saved register area rlwinm r6, r4, 2, 0, 29 # r6 = r4 * 4 - lwzx r3, r5, r6 # load argument in r3 addi r4, r4, 1 # increment ap->ireg stb r4, 0(r3) + lwzx r3, r5, r6 # load argument in r3 blr # Next argument was passed on stack 1: lwz r5, 4(r3) # r5 = ap->stk = next argument passed on stack - lwz r3, 0(r5) # load argument in r3 addi r5, r5, 4 # advance ap->stk by 4 stw r5, 4(r3) + lwz r3, -4(r5) # load argument in r3 blr .type __compcert_va_int32, @function .size __compcert_va_int32, .-__compcert_va_int32 @@ -86,19 +86,19 @@ __compcert_va_int64: rlwinm r4, r4, 0, 0, 30 rlwinm r6, r4, 2, 0, 29 # r6 = r4 * 4 add r5, r5, r6 # r5 = address of argument + 8 - stb r4, 8(r3) # update ap->ireg + stb r4, 0(r3) # update ap->ireg lwz r3, -8(r5) # load argument in r3:r4 lwz r4, -4(r5) blr # Next argument was passed on stack 1: lwz r5, 4(r3) # r5 = ap->stk = next argument passed on stack li r4, 8 - stb r4, 8(r3) # set ap->ireg = 8 so that no ireg is left + stb r4, 0(r3) # set ap->ireg = 8 so that no ireg is left addi r5, r5, 15 # round r5 to a multiple of 8 and add 8 rlwinm r5, r5, 0, 0, 28 + stw r5, 4(r3) # update ap->stk lwz r3, -8(r5) # load argument in r3:r4 lwz r4, -4(r5) - stw r5, 4(r3) # update ap->stk blr .type __compcert_va_int64, @function .size __compcert_va_int64, .-__compcert_va_int64 |