diff options
| author |  Derek Mauro <dmauro@google.com> | 2023-01-04 09:02:12 -0800 |
|---|---|---|
| committer |  Copybara-Service <copybara-worker@google.com> | 2023-01-04 09:03:04 -0800 |
| commit | 58ba57346c5ea69965897af193b6641f5965c7d6 (patch) | |
| tree | bbe95a622978b16a3503dd6f8c9678e35c69e85a /absl/crc | |
| parent | 74d8b4d9bd5f8cf7b949b01e106c33cd0f0eba0a (diff) | |
Require 64-bit builds on x86 to use CRC32 hardware acceleration
32-bit builds with SSE 4.2 do exist, and these builds do not work
without this patch.
PiperOrigin-RevId: 499498979
Change-Id: I0ade09068804655652c07d0f1ef13554464a1558
Diffstat (limited to 'absl/crc')
| -rw-r--r-- | absl/crc/internal/crc32_x86_arm_combined_simd.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/absl/crc/internal/crc32_x86_arm_combined_simd.h b/absl/crc/internal/crc32_x86_arm_combined_simd.h index f23cd75e..344042d8 100644 --- a/absl/crc/internal/crc32_x86_arm_combined_simd.h +++ b/absl/crc/internal/crc32_x86_arm_combined_simd.h @@ -25,8 +25,10 @@ // We define a translation layer for both x86 and ARM for the ease of use and // most performance gains. -// We need CRC (part of SSE 4.2) and PCLMULQDQ instructions. -#if defined(__SSE4_2__) && defined(__PCLMUL__) +// This implementation requires 64-bit CRC instructions (part of SSE 4.2) and +// PCLMULQDQ instructions. 32-bit builds with SSE 4.2 do exist, so the +// __x86_64__ condition is necessary. +#if defined(__x86_64__) && defined(__SSE4_2__) && defined(__PCLMUL__) #include <x86intrin.h> #define ABSL_CRC_INTERNAL_HAVE_X86_SIMD |