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authorGravatar Trish Lam <trishvylam@gmail.com>2023-02-06 12:11:17 -0800
committerGravatar Trish Lam <trishvylam@gmail.com>2023-02-06 12:11:17 -0800
commit8e3a3e5f56407f3d675ac9041a20f7455c2ef01a (patch)
tree5b3b75621e1aae84f33e5b808ff09342ee8f376b /absl/base/config.h
parentcdad8cd96ee9bfe11056997dc960eb2e52c6b00e (diff)
Solving issue with implied SSE when running ARM64EC
Diffstat (limited to 'absl/base/config.h')
-rw-r--r--absl/base/config.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/absl/base/config.h b/absl/base/config.h
index c2a973af..73d6213d 100644
--- a/absl/base/config.h
+++ b/absl/base/config.h
@@ -889,7 +889,7 @@ static_assert(ABSL_INTERNAL_INLINE_NAMESPACE_STR[0] != 'h' ||
#error ABSL_INTERNAL_HAVE_SSE cannot be directly set
#elif defined(__SSE__)
#define ABSL_INTERNAL_HAVE_SSE 1
-#elif defined(_M_X64) || (defined(_M_IX86_FP) && _M_IX86_FP >= 1)
+#elif (defined(_M_X64) || (defined(_M_IX86_FP) && _M_IX86_FP >= 1)) && !defined(_M_ARM64EC)
// MSVC only defines _M_IX86_FP for x86 32-bit code, and _M_IX86_FP >= 1
// indicates that at least SSE was targeted with the /arch:SSE option.
// All x86-64 processors support SSE, so support can be assumed.
@@ -904,7 +904,7 @@ static_assert(ABSL_INTERNAL_INLINE_NAMESPACE_STR[0] != 'h' ||
#error ABSL_INTERNAL_HAVE_SSE2 cannot be directly set
#elif defined(__SSE2__)
#define ABSL_INTERNAL_HAVE_SSE2 1
-#elif defined(_M_X64) || (defined(_M_IX86_FP) && _M_IX86_FP >= 2)
+#elif (defined(_M_X64) || (defined(_M_IX86_FP) && _M_IX86_FP >= 2)) && !defined(_M_ARM64EC)
// MSVC only defines _M_IX86_FP for x86 32-bit code, and _M_IX86_FP >= 2
// indicates that at least SSE2 was targeted with the /arch:SSE2 option.
// All x86-64 processors support SSE2, so support can be assumed.