summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorGravatar Abseil Team <absl-team@google.com>2023-08-29 13:21:11 -0700
committerGravatar Copybara-Service <copybara-worker@google.com>2023-08-29 13:22:13 -0700
commitf6fc4efa6edf7285512797a5e68373994dd2df27 (patch)
tree83d814eff89ac056e7076302e770364f084508d9
parent76930e30986f89868e765cdf26b698eb33bdbaa5 (diff)
Enable non_temporal_store_memcpy for AMD Milan, Genoa, and Ryzen 3000
PiperOrigin-RevId: 561119886 Change-Id: Ia1483fdb237f4b211068c7ad1f780ab3e6b81eca
-rw-r--r--absl/crc/internal/crc_memcpy_x86_64.cc6
1 files changed, 6 insertions, 0 deletions
diff --git a/absl/crc/internal/crc_memcpy_x86_64.cc b/absl/crc/internal/crc_memcpy_x86_64.cc
index 35d1273e..c984cf9a 100644
--- a/absl/crc/internal/crc_memcpy_x86_64.cc
+++ b/absl/crc/internal/crc_memcpy_x86_64.cc
@@ -350,6 +350,9 @@ CrcMemcpy::ArchSpecificEngines CrcMemcpy::GetArchSpecificEngines() {
switch (cpu_type) {
case CpuType::kAmdRome:
case CpuType::kAmdNaples:
+ case CpuType::kAmdMilan:
+ case CpuType::kAmdGenoa:
+ case CpuType::kAmdRyzenV3000:
case CpuType::kIntelCascadelakeXeon:
case CpuType::kIntelSkylakeXeon:
case CpuType::kIntelSkylake:
@@ -385,6 +388,9 @@ CrcMemcpy::ArchSpecificEngines CrcMemcpy::GetArchSpecificEngines() {
// strided access to each region, and do the right thing.
case CpuType::kAmdRome:
case CpuType::kAmdNaples:
+ case CpuType::kAmdMilan:
+ case CpuType::kAmdGenoa:
+ case CpuType::kAmdRyzenV3000:
return {
/*.temporal=*/new AcceleratedCrcMemcpyEngine<1, 2>(),
/*.non_temporal=*/new CrcNonTemporalMemcpyAVXEngine(),