diff options
Diffstat (limited to 'src/core/src/arm/armdefs.h')
| -rw-r--r-- | src/core/src/arm/armdefs.h | 550 |
1 files changed, 275 insertions, 275 deletions
diff --git a/src/core/src/arm/armdefs.h b/src/core/src/arm/armdefs.h index 69cf790e..0136a52d 100644 --- a/src/core/src/arm/armdefs.h +++ b/src/core/src/arm/armdefs.h @@ -89,7 +89,7 @@ #endif //#define DBCT_TEST_SPEED -#define DBCT_TEST_SPEED_SEC 10 +#define DBCT_TEST_SPEED_SEC 10 //AJ2D-------------------------------------------------------------------------- //teawater add compile switch for DBCT GDB RSP function 2005.10.21-------------- @@ -99,9 +99,9 @@ //#include <skyeye_defs.h> //#include <skyeye_types.h> -#define ARM_BYTE_TYPE 0 -#define ARM_HALFWORD_TYPE 1 -#define ARM_WORD_TYPE 2 +#define ARM_BYTE_TYPE 0 +#define ARM_HALFWORD_TYPE 1 +#define ARM_WORD_TYPE 2 //the define of cachetype #define NONCACHE 0 @@ -112,10 +112,10 @@ typedef char *VoidStar; #endif -typedef unsigned long long ARMdword; /* must be 64 bits wide */ -typedef unsigned int ARMword; /* must be 32 bits wide */ -typedef unsigned char ARMbyte; /* must be 8 bits wide */ -typedef unsigned short ARMhword; /* must be 16 bits wide */ +typedef unsigned long long ARMdword; /* must be 64 bits wide */ +typedef unsigned int ARMword; /* must be 32 bits wide */ +typedef unsigned char ARMbyte; /* must be 8 bits wide */ +typedef unsigned short ARMhword; /* must be 16 bits wide */ typedef struct ARMul_State ARMul_State; typedef struct ARMul_io ARMul_io; typedef struct ARMul_Energy ARMul_Energy; @@ -152,59 +152,59 @@ typedef unsigned long long uint64_t; typedef unsigned ARMul_CPInits (ARMul_State * state); typedef unsigned ARMul_CPExits (ARMul_State * state); typedef unsigned ARMul_LDCs (ARMul_State * state, unsigned type, - ARMword instr, ARMword value); + ARMword instr, ARMword value); typedef unsigned ARMul_STCs (ARMul_State * state, unsigned type, - ARMword instr, ARMword * value); + ARMword instr, ARMword * value); typedef unsigned ARMul_MRCs (ARMul_State * state, unsigned type, - ARMword instr, ARMword * value); + ARMword instr, ARMword * value); typedef unsigned ARMul_MCRs (ARMul_State * state, unsigned type, - ARMword instr, ARMword value); + ARMword instr, ARMword value); typedef unsigned ARMul_MRRCs (ARMul_State * state, unsigned type, - ARMword instr, ARMword * value1, ARMword * value2); + ARMword instr, ARMword * value1, ARMword * value2); typedef unsigned ARMul_MCRRs (ARMul_State * state, unsigned type, - ARMword instr, ARMword value1, ARMword value2); + ARMword instr, ARMword value1, ARMword value2); typedef unsigned ARMul_CDPs (ARMul_State * state, unsigned type, - ARMword instr); + ARMword instr); typedef unsigned ARMul_CPReads (ARMul_State * state, unsigned reg, - ARMword * value); + ARMword * value); typedef unsigned ARMul_CPWrites (ARMul_State * state, unsigned reg, - ARMword value); + ARMword value); //added by ksh,2004-3-5 struct ARMul_io { - ARMword *instr; //to display the current interrupt state - ARMword *net_flag; //to judge if network is enabled - ARMword *net_int; //netcard interrupt - - //ywc,2004-04-01 - ARMword *ts_int; - ARMword *ts_is_enable; - ARMword *ts_addr_begin; - ARMword *ts_addr_end; - ARMword *ts_buffer; + ARMword *instr; //to display the current interrupt state + ARMword *net_flag; //to judge if network is enabled + ARMword *net_int; //netcard interrupt + + //ywc,2004-04-01 + ARMword *ts_int; + ARMword *ts_is_enable; + ARMword *ts_addr_begin; + ARMword *ts_addr_end; + ARMword *ts_buffer; }; /* added by ksh,2004-11-26,some energy profiling */ struct ARMul_Energy { - int energy_prof; /* <tktan> BUG200103282109 : for energy profiling */ - int enable_func_energy; /* <tktan> BUG200105181702 */ - char *func_energy; - int func_display; /* <tktan> BUG200103311509 : for function call display */ - int func_disp_start; /* <tktan> BUG200104191428 : to start func profiling */ - char *start_func; /* <tktan> BUG200104191428 */ - - FILE *outfile; /* <tktan> BUG200105201531 : direct console to file */ - long long tcycle, pcycle; - float t_energy; - void *cur_task; /* <tktan> BUG200103291737 */ - long long t_mem_cycle, t_idle_cycle, t_uart_cycle; - long long p_mem_cycle, p_idle_cycle, p_uart_cycle; - long long p_io_update_tcycle; - /*record CCCR,to get current core frequency */ - ARMword cccr; + int energy_prof; /* <tktan> BUG200103282109 : for energy profiling */ + int enable_func_energy; /* <tktan> BUG200105181702 */ + char *func_energy; + int func_display; /* <tktan> BUG200103311509 : for function call display */ + int func_disp_start; /* <tktan> BUG200104191428 : to start func profiling */ + char *start_func; /* <tktan> BUG200104191428 */ + + FILE *outfile; /* <tktan> BUG200105201531 : direct console to file */ + long long tcycle, pcycle; + float t_energy; + void *cur_task; /* <tktan> BUG200103291737 */ + long long t_mem_cycle, t_idle_cycle, t_uart_cycle; + long long p_mem_cycle, p_idle_cycle, p_uart_cycle; + long long p_io_update_tcycle; + /*record CCCR,to get current core frequency */ + ARMword cccr; }; #if 0 #define MAX_BANK 8 @@ -212,119 +212,119 @@ struct ARMul_Energy typedef struct mem_bank { - ARMword (*read_byte) (ARMul_State * state, ARMword addr); - void (*write_byte) (ARMul_State * state, ARMword addr, ARMword data); - ARMword (*read_halfword) (ARMul_State * state, ARMword addr); - void (*write_halfword) (ARMul_State * state, ARMword addr, - ARMword data); - ARMword (*read_word) (ARMul_State * state, ARMword addr); - void (*write_word) (ARMul_State * state, ARMword addr, ARMword data); - unsigned int addr, len; - char filename[MAX_STR]; - unsigned type; //chy 2003-09-21: maybe io,ram,rom + ARMword (*read_byte) (ARMul_State * state, ARMword addr); + void (*write_byte) (ARMul_State * state, ARMword addr, ARMword data); + ARMword (*read_halfword) (ARMul_State * state, ARMword addr); + void (*write_halfword) (ARMul_State * state, ARMword addr, + ARMword data); + ARMword (*read_word) (ARMul_State * state, ARMword addr); + void (*write_word) (ARMul_State * state, ARMword addr, ARMword data); + unsigned int addr, len; + char filename[MAX_STR]; + unsigned type; //chy 2003-09-21: maybe io,ram,rom } mem_bank_t; typedef struct { - int bank_num; - int current_num; /*current num of bank */ - mem_bank_t mem_banks[MAX_BANK]; + int bank_num; + int current_num; /*current num of bank */ + mem_bank_t mem_banks[MAX_BANK]; } mem_config_t; #endif #define VFP_REG_NUM 64 struct ARMul_State { - ARMword Emulate; /* to start and stop emulation */ - unsigned EndCondition; /* reason for stopping */ - unsigned ErrorCode; /* type of illegal instruction */ - - /* Order of the following register should not be modified */ - ARMword Reg[16]; /* the current register file */ - ARMword Cpsr; /* the current psr */ - ARMword Spsr_copy; - ARMword phys_pc; - ARMword Reg_usr[2]; - ARMword Reg_svc[2]; /* R13_SVC R14_SVC */ - ARMword Reg_abort[2]; /* R13_ABORT R14_ABORT */ - ARMword Reg_undef[2]; /* R13 UNDEF R14 UNDEF */ - ARMword Reg_irq[2]; /* R13_IRQ R14_IRQ */ - ARMword Reg_firq[7]; /* R8---R14 FIRQ */ - ARMword Spsr[7]; /* the exception psr's */ - ARMword Mode; /* the current mode */ - ARMword Bank; /* the current register bank */ - ARMword exclusive_tag; - ARMword exclusive_state; - ARMword exclusive_result; - ARMword CP15[VFP_BASE - CP15_BASE]; - ARMword VFP[3]; /* FPSID, FPSCR, and FPEXC */ - /* VFPv2 and VFPv3-D16 has 16 doubleword registers (D0-D16 or S0-S31). - VFPv3-D32/ASIMD may have up to 32 doubleword registers (D0-D31), - and only 32 singleword registers are accessible (S0-S31). */ - ARMword ExtReg[VFP_REG_NUM]; - /* ---- End of the ordered registers ---- */ - - ARMword RegBank[7][16]; /* all the registers */ - //chy:2003-08-19, used in arm xscale - /* 40 bit accumulator. We always keep this 64 bits wide, - and move only 40 bits out of it in an MRA insn. */ - ARMdword Accumulator; - - ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags; /* dummy flags for speed */ + ARMword Emulate; /* to start and stop emulation */ + unsigned EndCondition; /* reason for stopping */ + unsigned ErrorCode; /* type of illegal instruction */ + + /* Order of the following register should not be modified */ + ARMword Reg[16]; /* the current register file */ + ARMword Cpsr; /* the current psr */ + ARMword Spsr_copy; + ARMword phys_pc; + ARMword Reg_usr[2]; + ARMword Reg_svc[2]; /* R13_SVC R14_SVC */ + ARMword Reg_abort[2]; /* R13_ABORT R14_ABORT */ + ARMword Reg_undef[2]; /* R13 UNDEF R14 UNDEF */ + ARMword Reg_irq[2]; /* R13_IRQ R14_IRQ */ + ARMword Reg_firq[7]; /* R8---R14 FIRQ */ + ARMword Spsr[7]; /* the exception psr's */ + ARMword Mode; /* the current mode */ + ARMword Bank; /* the current register bank */ + ARMword exclusive_tag; + ARMword exclusive_state; + ARMword exclusive_result; + ARMword CP15[VFP_BASE - CP15_BASE]; + ARMword VFP[3]; /* FPSID, FPSCR, and FPEXC */ + /* VFPv2 and VFPv3-D16 has 16 doubleword registers (D0-D16 or S0-S31). + VFPv3-D32/ASIMD may have up to 32 doubleword registers (D0-D31), + and only 32 singleword registers are accessible (S0-S31). */ + ARMword ExtReg[VFP_REG_NUM]; + /* ---- End of the ordered registers ---- */ + + ARMword RegBank[7][16]; /* all the registers */ + //chy:2003-08-19, used in arm xscale + /* 40 bit accumulator. We always keep this 64 bits wide, + and move only 40 bits out of it in an MRA insn. */ + ARMdword Accumulator; + + ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags; /* dummy flags for speed */ unsigned long long int icounter, debug_icounter, kernel_icounter; unsigned int shifter_carry_out; //ARMword translate_pc; - /* add armv6 flags dyf:2010-08-09 */ - ARMword GEFlag, EFlag, AFlag, QFlags; - //chy:2003-08-19, used in arm v5e|xscale - ARMword SFlag; + /* add armv6 flags dyf:2010-08-09 */ + ARMword GEFlag, EFlag, AFlag, QFlags; + //chy:2003-08-19, used in arm v5e|xscale + ARMword SFlag; #ifdef MODET - ARMword TFlag; /* Thumb state */ + ARMword TFlag; /* Thumb state */ #endif - ARMword instr, pc, temp; /* saved register state */ - ARMword loaded, decoded; /* saved pipeline state */ - //chy 2006-04-12 for ICE breakpoint - ARMword loaded_addr, decoded_addr; /* saved pipeline state addr*/ - unsigned int NumScycles, NumNcycles, NumIcycles, NumCcycles, NumFcycles; /* emulated cycles used */ - unsigned long long NumInstrs; /* the number of instructions executed */ - unsigned NextInstr; - unsigned VectorCatch; /* caught exception mask */ - unsigned CallDebug; /* set to call the debugger */ - unsigned CanWatch; /* set by memory interface if its willing to suffer the - overhead of checking for watchpoints on each memory - access */ - unsigned int StopHandle; - - char *CommandLine; /* Command Line from ARMsd */ - - ARMul_CPInits *CPInit[16]; /* coprocessor initialisers */ - ARMul_CPExits *CPExit[16]; /* coprocessor finalisers */ - ARMul_LDCs *LDC[16]; /* LDC instruction */ - ARMul_STCs *STC[16]; /* STC instruction */ - ARMul_MRCs *MRC[16]; /* MRC instruction */ - ARMul_MCRs *MCR[16]; /* MCR instruction */ - ARMul_MRRCs *MRRC[16]; /* MRRC instruction */ - ARMul_MCRRs *MCRR[16]; /* MCRR instruction */ - ARMul_CDPs *CDP[16]; /* CDP instruction */ - ARMul_CPReads *CPRead[16]; /* Read CP register */ - ARMul_CPWrites *CPWrite[16]; /* Write CP register */ - unsigned char *CPData[16]; /* Coprocessor data */ - unsigned char const *CPRegWords[16]; /* map of coprocessor register sizes */ - - unsigned EventSet; /* the number of events in the queue */ - unsigned int Now; /* time to the nearest cycle */ - struct EventNode **EventPtr; /* the event list */ - - unsigned Debug; /* show instructions as they are executed */ - unsigned NresetSig; /* reset the processor */ - unsigned NfiqSig; - unsigned NirqSig; - - unsigned abortSig; - unsigned NtransSig; - unsigned bigendSig; - unsigned prog32Sig; - unsigned data32Sig; - unsigned syscallSig; + ARMword instr, pc, temp; /* saved register state */ + ARMword loaded, decoded; /* saved pipeline state */ + //chy 2006-04-12 for ICE breakpoint + ARMword loaded_addr, decoded_addr; /* saved pipeline state addr*/ + unsigned int NumScycles, NumNcycles, NumIcycles, NumCcycles, NumFcycles; /* emulated cycles used */ + unsigned long long NumInstrs; /* the number of instructions executed */ + unsigned NextInstr; + unsigned VectorCatch; /* caught exception mask */ + unsigned CallDebug; /* set to call the debugger */ + unsigned CanWatch; /* set by memory interface if its willing to suffer the + overhead of checking for watchpoints on each memory + access */ + unsigned int StopHandle; + + char *CommandLine; /* Command Line from ARMsd */ + + ARMul_CPInits *CPInit[16]; /* coprocessor initialisers */ + ARMul_CPExits *CPExit[16]; /* coprocessor finalisers */ + ARMul_LDCs *LDC[16]; /* LDC instruction */ + ARMul_STCs *STC[16]; /* STC instruction */ + ARMul_MRCs *MRC[16]; /* MRC instruction */ + ARMul_MCRs *MCR[16]; /* MCR instruction */ + ARMul_MRRCs *MRRC[16]; /* MRRC instruction */ + ARMul_MCRRs *MCRR[16]; /* MCRR instruction */ + ARMul_CDPs *CDP[16]; /* CDP instruction */ + ARMul_CPReads *CPRead[16]; /* Read CP register */ + ARMul_CPWrites *CPWrite[16]; /* Write CP register */ + unsigned char *CPData[16]; /* Coprocessor data */ + unsigned char const *CPRegWords[16]; /* map of coprocessor register sizes */ + + unsigned EventSet; /* the number of events in the queue */ + unsigned int Now; /* time to the nearest cycle */ + struct EventNode **EventPtr; /* the event list */ + + unsigned Debug; /* show instructions as they are executed */ + unsigned NresetSig; /* reset the processor */ + unsigned NfiqSig; + unsigned NirqSig; + + unsigned abortSig; + unsigned NtransSig; + unsigned bigendSig; + unsigned prog32Sig; + unsigned data32Sig; + unsigned syscallSig; /* 2004-05-09 chy ---------------------------------------------------------- @@ -357,115 +357,115 @@ on later processors, this bit reads as 1 and ignores writes. So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model) if lateabtSig=0, then it means Base Restored Abort Model */ - unsigned lateabtSig; - - ARMword Vector; /* synthesize aborts in cycle modes */ - ARMword Aborted; /* sticky flag for aborts */ - ARMword Reseted; /* sticky flag for Reset */ - ARMword Inted, LastInted; /* sticky flags for interrupts */ - ARMword Base; /* extra hand for base writeback */ - ARMword AbortAddr; /* to keep track of Prefetch aborts */ - - const struct Dbg_HostosInterface *hostif; - - int verbose; /* non-zero means print various messages like the banner */ - - mmu_state_t mmu; - int mmu_inited; - //mem_state_t mem; - /*remove io_state to skyeye_mach_*.c files */ - //io_state_t io; - /* point to a interrupt pending register. now for skyeye-ne2k.c - * later should move somewhere. e.g machine_config_t*/ - - - //chy: 2003-08-11, for different arm core type - unsigned is_v4; /* Are we emulating a v4 architecture (or higher) ? */ - unsigned is_v5; /* Are we emulating a v5 architecture ? */ - unsigned is_v5e; /* Are we emulating a v5e architecture ? */ - unsigned is_v6; /* Are we emulating a v6 architecture ? */ - unsigned is_v7; /* Are we emulating a v7 architecture ? */ - unsigned is_XScale; /* Are we emulating an XScale architecture ? */ - unsigned is_iWMMXt; /* Are we emulating an iWMMXt co-processor ? */ - unsigned is_ep9312; /* Are we emulating a Cirrus Maverick co-processor ? */ - //chy 2005-09-19 - unsigned is_pxa27x; /* Are we emulating a Intel PXA27x co-processor ? */ - //chy: seems only used in xscale's CP14 - unsigned int LastTime; /* Value of last call to ARMul_Time() */ - ARMword CP14R0_CCD; /* used to count 64 clock cycles with CP14 R0 bit 3 set */ + unsigned lateabtSig; + + ARMword Vector; /* synthesize aborts in cycle modes */ + ARMword Aborted; /* sticky flag for aborts */ + ARMword Reseted; /* sticky flag for Reset */ + ARMword Inted, LastInted; /* sticky flags for interrupts */ + ARMword Base; /* extra hand for base writeback */ + ARMword AbortAddr; /* to keep track of Prefetch aborts */ + + const struct Dbg_HostosInterface *hostif; + + int verbose; /* non-zero means print various messages like the banner */ + + mmu_state_t mmu; + int mmu_inited; + //mem_state_t mem; + /*remove io_state to skyeye_mach_*.c files */ + //io_state_t io; + /* point to a interrupt pending register. now for skyeye-ne2k.c + * later should move somewhere. e.g machine_config_t*/ + + + //chy: 2003-08-11, for different arm core type + unsigned is_v4; /* Are we emulating a v4 architecture (or higher) ? */ + unsigned is_v5; /* Are we emulating a v5 architecture ? */ + unsigned is_v5e; /* Are we emulating a v5e architecture ? */ + unsigned is_v6; /* Are we emulating a v6 architecture ? */ + unsigned is_v7; /* Are we emulating a v7 architecture ? */ + unsigned is_XScale; /* Are we emulating an XScale architecture ? */ + unsigned is_iWMMXt; /* Are we emulating an iWMMXt co-processor ? */ + unsigned is_ep9312; /* Are we emulating a Cirrus Maverick co-processor ? */ + //chy 2005-09-19 + unsigned is_pxa27x; /* Are we emulating a Intel PXA27x co-processor ? */ + //chy: seems only used in xscale's CP14 + unsigned int LastTime; /* Value of last call to ARMul_Time() */ + ARMword CP14R0_CCD; /* used to count 64 clock cycles with CP14 R0 bit 3 set */ //added by ksh:for handle different machs io 2004-3-5 - ARMul_io mach_io; + ARMul_io mach_io; /*added by ksh,2004-11-26,some energy profiling*/ - ARMul_Energy energy; + ARMul_Energy energy; //teawater add for next_dis 2004.10.27----------------------- - int disassemble; + int disassemble; //AJ2D------------------------------------------ //teawater add for arm2x86 2005.02.15------------------------------------------- - u32 trap; - u32 tea_break_addr; - u32 tea_break_ok; - int tea_pc; + u32 trap; + u32 tea_break_addr; + u32 tea_break_ok; + int tea_pc; //AJ2D-------------------------------------------------------------------------- //teawater add for arm2x86 2005.07.03------------------------------------------- - /* - * 2007-01-24 removed the term-io functions by Anthony Lee, - * moved to "device/uart/skyeye_uart_stdio.c". - */ + /* + * 2007-01-24 removed the term-io functions by Anthony Lee, + * moved to "device/uart/skyeye_uart_stdio.c". + */ //AJ2D-------------------------------------------------------------------------- //teawater add for arm2x86 2005.07.05------------------------------------------- - //arm_arm A2-18 - int abort_model; //0 Base Restored Abort Model, 1 the Early Abort Model, 2 Base Updated Abort Model + //arm_arm A2-18 + int abort_model; //0 Base Restored Abort Model, 1 the Early Abort Model, 2 Base Updated Abort Model //AJ2D-------------------------------------------------------------------------- //teawater change for return if running tb dirty 2005.07.09--------------------- - void *tb_now; + void *tb_now; //AJ2D-------------------------------------------------------------------------- //teawater add for record reg value to ./reg.txt 2005.07.10--------------------- - FILE *tea_reg_fd; + FILE *tea_reg_fd; //AJ2D-------------------------------------------------------------------------- /*added by ksh in 2005-10-1*/ - cpu_config_t *cpu; - //mem_config_t *mem_bank; + cpu_config_t *cpu; + //mem_config_t *mem_bank; /* added LPC remap function */ - int vector_remap_flag; - u32 vector_remap_addr; - u32 vector_remap_size; - - u32 step; - u32 cycle; - int stop_simulator; - conf_object_t *dyncom_cpu; + int vector_remap_flag; + u32 vector_remap_addr; + u32 vector_remap_size; + + u32 step; + u32 cycle; + int stop_simulator; + conf_object_t *dyncom_cpu; //teawater add DBCT_TEST_SPEED 2005.10.04--------------------------------------- #ifdef DBCT_TEST_SPEED - uint64_t instr_count; -#endif //DBCT_TEST_SPEED -// FILE * state_log; + uint64_t instr_count; +#endif //DBCT_TEST_SPEED +// FILE * state_log; //diff log //#if DIFF_STATE - FILE * state_log; + FILE * state_log; //#endif - /* monitored memory for exclusice access */ - ARMword exclusive_tag_array[128]; - /* 1 means exclusive access and 0 means open access */ - ARMword exclusive_access_state; - - memory_space_intf space; - u32 CurrInstr; - u32 last_pc; /* the last pc executed */ - u32 last_instr; /* the last inst executed */ - u32 WriteAddr[17]; - u32 WriteData[17]; - u32 WritePc[17]; - u32 CurrWrite; + /* monitored memory for exclusice access */ + ARMword exclusive_tag_array[128]; + /* 1 means exclusive access and 0 means open access */ + ARMword exclusive_access_state; + + memory_space_intf space; + u32 CurrInstr; + u32 last_pc; /* the last pc executed */ + u32 last_instr; /* the last inst executed */ + u32 WriteAddr[17]; + u32 WriteData[17]; + u32 WritePc[17]; + u32 CurrWrite; }; #define DIFF_WRITE 0 @@ -510,7 +510,7 @@ typedef ARMul_State arm_core_t; #define ARM61 ARM2 #define ARM3 ARM2 -#ifdef ARM60 /* previous definition in armopts.h */ +#ifdef ARM60 /* previous definition in armopts.h */ #undef ARM60 #endif @@ -526,9 +526,9 @@ typedef ARMul_State arm_core_t; * Macros to extract instruction fields * \***************************************************************************/ -#define BIT(n) ( (ARMword)(instr>>(n))&1) /* bit n of instruction */ -#define BITS(m,n) ( (ARMword)(instr<<(31-(n))) >> ((31-(n))+(m)) ) /* bits m to n of instr */ -#define TOPBITS(n) (instr >> (n)) /* bits 31 to n of instr */ +#define BIT(n) ( (ARMword)(instr>>(n))&1) /* bit n of instruction */ +#define BITS(m,n) ( (ARMword)(instr<<(31-(n))) >> ((31-(n))+(m)) ) /* bits m to n of instr */ +#define TOPBITS(n) (instr >> (n)) /* bits 31 to n of instr */ /***************************************************************************\ * The hardware vector addresses * @@ -542,7 +542,7 @@ typedef ARMul_State arm_core_t; #define ARMAddrExceptnV 20L #define ARMIRQV 24L #define ARMFIQV 28L -#define ARMErrorV 32L /* This is an offset, not an address ! */ +#define ARMErrorV 32L /* This is an offset, not an address ! */ #define ARMul_ResetV ARMResetV #define ARMul_UndefinedInstrV ARMUndefinedInstrV @@ -598,7 +598,7 @@ extern "C" { extern void ARMul_EmulateInit (void); extern void ARMul_Reset (ARMul_State * state); #ifdef __cplusplus - } + } #endif extern ARMul_State *ARMul_NewState (ARMul_State * state); extern ARMword ARMul_DoProg (ARMul_State * state); @@ -608,7 +608,7 @@ extern ARMword ARMul_DoInstr (ARMul_State * state); \***************************************************************************/ extern void ARMul_ScheduleEvent (ARMul_State * state, unsigned int delay, - unsigned (*func) ()); + unsigned (*func) ()); extern void ARMul_EnvokeEvent (ARMul_State * state); extern unsigned int ARMul_Time (ARMul_State * state); @@ -617,9 +617,9 @@ extern unsigned int ARMul_Time (ARMul_State * state); \***************************************************************************/ extern ARMword ARMul_GetReg (ARMul_State * state, unsigned mode, - unsigned reg); + unsigned reg); extern void ARMul_SetReg (ARMul_State * state, unsigned mode, unsigned reg, - ARMword value); + ARMword value); extern ARMword ARMul_GetPC (ARMul_State * state); extern ARMword ARMul_GetNextPC (ARMul_State * state); extern void ARMul_SetPC (ARMul_State * state, ARMword value); @@ -637,11 +637,11 @@ extern void ARMul_SetSPSR (ARMul_State * state, ARMword mode, ARMword value); extern void ARMul_Abort (ARMul_State * state, ARMword address); #ifdef MODET -#define ARMul_ABORTWORD (state->TFlag ? 0xefffdfff : 0xefffffff) /* SWI -1 */ +#define ARMul_ABORTWORD (state->TFlag ? 0xefffdfff : 0xefffffff) /* SWI -1 */ #define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \ state->AbortAddr = (address & (state->TFlag ? ~1L : ~3L)) #else -#define ARMul_ABORTWORD 0xefffffff /* SWI -1 */ +#define ARMul_ABORTWORD 0xefffffff /* SWI -1 */ #define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \ state->AbortAddr = (address & ~3L) #endif @@ -654,20 +654,20 @@ extern void ARMul_Abort (ARMul_State * state, ARMword address); \***************************************************************************/ extern unsigned ARMul_MemoryInit (ARMul_State * state, - unsigned int initmemsize); + unsigned int initmemsize); extern void ARMul_MemoryExit (ARMul_State * state); extern ARMword ARMul_LoadInstrS (ARMul_State * state, ARMword address, - ARMword isize); + ARMword isize); extern ARMword ARMul_LoadInstrN (ARMul_State * state, ARMword address, - ARMword isize); + ARMword isize); #ifdef __cplusplus extern "C" { #endif extern ARMword ARMul_ReLoadInstr (ARMul_State * state, ARMword address, - ARMword isize); + ARMword isize); #ifdef __cplusplus - } + } #endif extern ARMword ARMul_LoadWordS (ARMul_State * state, ARMword address); extern ARMword ARMul_LoadWordN (ARMul_State * state, ARMword address); @@ -675,34 +675,34 @@ extern ARMword ARMul_LoadHalfWord (ARMul_State * state, ARMword address); extern ARMword ARMul_LoadByte (ARMul_State * state, ARMword address); extern void ARMul_StoreWordS (ARMul_State * state, ARMword address, - ARMword data); + ARMword data); extern void ARMul_StoreWordN (ARMul_State * state, ARMword address, - ARMword data); + ARMword data); extern void ARMul_StoreHalfWord (ARMul_State * state, ARMword address, - ARMword data); + ARMword data); extern void ARMul_StoreByte (ARMul_State * state, ARMword address, - ARMword data); + ARMword data); extern ARMword ARMul_SwapWord (ARMul_State * state, ARMword address, - ARMword data); + ARMword data); extern ARMword ARMul_SwapByte (ARMul_State * state, ARMword address, - ARMword data); + ARMword data); extern void ARMul_Icycles (ARMul_State * state, unsigned number, - ARMword address); + ARMword address); extern void ARMul_Ccycles (ARMul_State * state, unsigned number, - ARMword address); + ARMword address); extern ARMword ARMul_ReadWord (ARMul_State * state, ARMword address); extern ARMword ARMul_ReadByte (ARMul_State * state, ARMword address); extern void ARMul_WriteWord (ARMul_State * state, ARMword address, - ARMword data); + ARMword data); extern void ARMul_WriteByte (ARMul_State * state, ARMword address, - ARMword data); + ARMword data); extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword, - ARMword, ARMword, ARMword, ARMword, ARMword, - ARMword, ARMword, ARMword); + ARMword, ARMword, ARMword, ARMword, ARMword, + ARMword, ARMword, ARMword); /***************************************************************************\ * Definitons of things in the co-processor interface * @@ -746,12 +746,12 @@ extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword, extern unsigned ARMul_CoProInit (ARMul_State * state); extern void ARMul_CoProExit (ARMul_State * state); extern void ARMul_CoProAttach (ARMul_State * state, unsigned number, - ARMul_CPInits * init, ARMul_CPExits * exit, - ARMul_LDCs * ldc, ARMul_STCs * stc, - ARMul_MRCs * mrc, ARMul_MCRs * mcr, - ARMul_MRRCs * mrrc, ARMul_MCRRs * mcrr, - ARMul_CDPs * cdp, - ARMul_CPReads * read, ARMul_CPWrites * write); + ARMul_CPInits * init, ARMul_CPExits * exit, + ARMul_LDCs * ldc, ARMul_STCs * stc, + ARMul_MRCs * mrc, ARMul_MCRs * mcr, + ARMul_MRRCs * mrrc, ARMul_MCRRs * mcrr, + ARMul_CDPs * cdp, + ARMul_CPReads * read, ARMul_CPWrites * write); extern void ARMul_CoProDetach (ARMul_State * state, unsigned number); /***************************************************************************\ @@ -775,7 +775,7 @@ extern ARMword ARMul_OSLastErrorP (ARMul_State * state); extern ARMword ARMul_Debug (ARMul_State * state, ARMword pc, ARMword instr); extern unsigned ARMul_OSException (ARMul_State * state, ARMword vector, - ARMword pc); + ARMword pc); extern int rdi_log; /***************************************************************************\ @@ -783,9 +783,9 @@ extern int rdi_log; \***************************************************************************/ #ifdef macintosh -pascal void SpinCursor (short increment); /* copied from CursorCtl.h */ +pascal void SpinCursor (short increment); /* copied from CursorCtl.h */ # define HOURGLASS SpinCursor( 1 ) -# define HOURGLASS_RATE 1023 /* 2^n - 1 */ +# define HOURGLASS_RATE 1023 /* 2^n - 1 */ #endif //teawater add for arm2x86 2005.02.14------------------------------------------- @@ -821,38 +821,38 @@ pascal void SpinCursor (short increment); /* copied from CursorCtl.h */ #define NV 15 #ifndef NFLAG -#define NFLAG state->NFlag +#define NFLAG state->NFlag #endif //NFLAG #ifndef ZFLAG -#define ZFLAG state->ZFlag +#define ZFLAG state->ZFlag #endif //ZFLAG #ifndef CFLAG -#define CFLAG state->CFlag +#define CFLAG state->CFlag #endif //CFLAG #ifndef VFLAG -#define VFLAG state->VFlag +#define VFLAG state->VFlag #endif //VFLAG #ifndef IFLAG -#define IFLAG (state->IFFlags >> 1) +#define IFLAG (state->IFFlags >> 1) #endif //IFLAG #ifndef FFLAG -#define FFLAG (state->IFFlags & 1) +#define FFLAG (state->IFFlags & 1) #endif //FFLAG #ifndef IFFLAGS -#define IFFLAGS state->IFFlags +#define IFFLAGS state->IFFlags #endif //VFLAG -#define FLAG_MASK 0xf0000000 -#define NBIT_SHIFT 31 -#define ZBIT_SHIFT 30 -#define CBIT_SHIFT 29 -#define VBIT_SHIFT 28 +#define FLAG_MASK 0xf0000000 +#define NBIT_SHIFT 31 +#define ZBIT_SHIFT 30 +#define CBIT_SHIFT 29 +#define VBIT_SHIFT 28 #ifdef DBCT //teawater change for local tb branch directly jump 2005.10.18------------------ #include "dbct/list.h" @@ -875,10 +875,10 @@ pascal void SpinCursor (short increment); /* copied from CursorCtl.h */ state->Reg[4],state->Reg[5],state->Reg[6],state->Reg[7], \ state->Reg[8],state->Reg[9],state->Reg[10],state->Reg[11], \ state->Reg[12],state->Reg[13],state->Reg[14],state->Reg[15], \ - state->Cpsr, state->Spsr[0], state->Spsr[1], state->Spsr[2],\ + state->Cpsr, state->Spsr[0], state->Spsr[1], state->Spsr[2],\ state->Spsr[3],state->Spsr[4], state->Spsr[5], state->Spsr[6],\ - state->Mode,state->Bank,state->ErrorCode,state->instr,state->pc,\ - state->temp,state->loaded,state->decoded);} + state->Mode,state->Bank,state->ErrorCode,state->instr,state->pc,\ + state->temp,state->loaded,state->decoded);} #define SKYEYE_OUTMOREREGS(fd) { fprintf ((fd),"\ RUs %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\ @@ -911,13 +911,13 @@ RUn %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x\n",\ state->RegBank[5][4],state->RegBank[5][5],state->RegBank[5][6],state->RegBank[5][7], \ state->RegBank[5][8],state->RegBank[5][9],state->RegBank[5][10],state->RegBank[5][11], \ state->RegBank[5][12],state->RegBank[5][13],state->RegBank[5][14],state->RegBank[5][15] \ - );} + );} #define SA1110 0x6901b110 #define SA1100 0x4401a100 -#define PXA250 0x69052100 -#define PXA270 0x69054110 +#define PXA250 0x69052100 +#define PXA270 0x69054110 //#define PXA250 0x69052903 // 0x69052903; //PXA250 B1 from intel 278522-001.pdf |