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Diffstat (limited to 'src/core/arm/dyncom/arm_dyncom_interpreter.cpp')
-rw-r--r--src/core/arm/dyncom/arm_dyncom_interpreter.cpp35
1 files changed, 11 insertions, 24 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
index fde11e4f..5ee99e93 100644
--- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
@@ -6,13 +6,12 @@
#include <algorithm>
#include <cstdio>
-#include <unordered_map>
#include "common/logging/log.h"
#include "common/profiler.h"
#include "core/mem_map.h"
-#include "core/hle/hle.h"
+#include "core/hle/svc.h"
#include "core/arm/disassembler/arm_disasm.h"
#include "core/arm/dyncom/arm_dyncom_interpreter.h"
#include "core/arm/dyncom/arm_dyncom_thumb.h"
@@ -3533,25 +3532,6 @@ const transop_fp_t arm_instruction_trans[] = {
INTERPRETER_TRANSLATE(blx_1_thumb)
};
-typedef std::unordered_map<u32, int> bb_map;
-static bb_map CreamCache;
-
-static void insert_bb(unsigned int addr, int start) {
- CreamCache[addr] = start;
-}
-
-static int find_bb(unsigned int addr, int& start) {
- int ret = -1;
- bb_map::const_iterator it = CreamCache.find(addr);
- if (it != CreamCache.end()) {
- start = static_cast<int>(it->second);
- ret = 0;
- } else {
- ret = -1;
- }
- return ret;
-}
-
enum {
FETCH_SUCCESS,
FETCH_FAILURE
@@ -3674,7 +3654,9 @@ translated:
}
ret = inst_base->br;
};
- insert_bb(pc_start, bb_start);
+
+ cpu->instruction_cache[pc_start] = bb_start;
+
return KEEP_GOING;
}
@@ -4001,9 +3983,14 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
phys_addr = cpu->Reg[15];
- if (find_bb(cpu->Reg[15], ptr) == -1)
+ // Find the cached instruction cream, otherwise translate it...
+ auto itr = cpu->instruction_cache.find(cpu->Reg[15]);
+ if (itr != cpu->instruction_cache.end()) {
+ ptr = itr->second;
+ } else {
if (InterpreterTranslate(cpu, ptr, cpu->Reg[15]) == FETCH_EXCEPTION)
goto END;
+ }
inst_base = (arm_inst *)&inst_buf[ptr];
GOTO_NEXT_INST;
@@ -6247,7 +6234,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
SWI_INST:
{
if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
- HLE::CallSVC(Memory::Read32(cpu->Reg[15]));
+ SVC::CallSVC(Memory::Read32(cpu->Reg[15]));
}
cpu->Reg[15] += GET_INST_SIZE(cpu);