diff options
Diffstat (limited to 'src/core/arm/disassembler/arm_disasm.h')
| -rw-r--r-- | src/core/arm/disassembler/arm_disasm.h | 97 |
1 files changed, 97 insertions, 0 deletions
diff --git a/src/core/arm/disassembler/arm_disasm.h b/src/core/arm/disassembler/arm_disasm.h index f94bd466..259a7786 100644 --- a/src/core/arm/disassembler/arm_disasm.h +++ b/src/core/arm/disassembler/arm_disasm.h @@ -20,6 +20,7 @@ enum Opcode { OP_BLX, OP_BX, OP_CDP, + OP_CLREX, OP_CLZ, OP_CMN, OP_CMP, @@ -29,6 +30,10 @@ enum Opcode { OP_LDR, OP_LDRB, OP_LDRBT, + OP_LDREX, + OP_LDREXB, + OP_LDREXD, + OP_LDREXH, OP_LDRH, OP_LDRSB, OP_LDRSH, @@ -41,28 +46,105 @@ enum Opcode { OP_MSR, OP_MUL, OP_MVN, + OP_NOP, OP_ORR, + OP_PKH, OP_PLD, + OP_QADD16, + OP_QADD8, + OP_QASX, + OP_QSAX, + OP_QSUB16, + OP_QSUB8, + OP_REV, + OP_REV16, + OP_REVSH, OP_RSB, OP_RSC, + OP_SADD16, + OP_SADD8, + OP_SASX, OP_SBC, + OP_SEL, + OP_SEV, + OP_SHADD16, + OP_SHADD8, + OP_SHASX, + OP_SHSAX, + OP_SHSUB16, + OP_SHSUB8, + OP_SMLAD, OP_SMLAL, + OP_SMLALD, + OP_SMLSD, + OP_SMLSLD, + OP_SMMLA, + OP_SMMLS, + OP_SMMUL, + OP_SMUAD, OP_SMULL, + OP_SMUSD, + OP_SSAT, + OP_SSAT16, + OP_SSAX, + OP_SSUB16, + OP_SSUB8, OP_STC, OP_STM, OP_STR, OP_STRB, OP_STRBT, + OP_STREX, + OP_STREXB, + OP_STREXD, + OP_STREXH, OP_STRH, OP_STRT, OP_SUB, OP_SWI, OP_SWP, OP_SWPB, + OP_SXTAB, + OP_SXTAB16, + OP_SXTAH, + OP_SXTB, + OP_SXTB16, + OP_SXTH, OP_TEQ, OP_TST, + OP_UADD16, + OP_UADD8, + OP_UASX, + OP_UHADD16, + OP_UHADD8, + OP_UHASX, + OP_UHSAX, + OP_UHSUB16, + OP_UHSUB8, OP_UMLAL, OP_UMULL, + OP_UQADD16, + OP_UQADD8, + OP_UQASX, + OP_UQSAX, + OP_UQSUB16, + OP_UQSUB8, + OP_USAD8, + OP_USADA8, + OP_USAT, + OP_USAT16, + OP_USAX, + OP_USUB16, + OP_USUB8, + OP_UXTAB, + OP_UXTAB16, + OP_UXTAH, + OP_UXTB, + OP_UXTB16, + OP_UXTH, + OP_WFE, + OP_WFI, + OP_YIELD, // Define thumb opcodes OP_THUMB_UNDEFINED, @@ -117,7 +199,13 @@ class ARM_Disasm { static Opcode Decode01(uint32_t insn); static Opcode Decode10(uint32_t insn); static Opcode Decode11(uint32_t insn); + static Opcode DecodeSyncPrimitive(uint32_t insn); + static Opcode DecodeParallelAddSub(uint32_t insn); + static Opcode DecodePackingSaturationReversal(uint32_t insn); static Opcode DecodeMUL(uint32_t insn); + static Opcode DecodeMSRImmAndHints(uint32_t insn); + static Opcode DecodeMediaMulDiv(uint32_t insn); + static Opcode DecodeMedia(uint32_t insn); static Opcode DecodeLDRH(uint32_t insn); static Opcode DecodeALU(uint32_t insn); @@ -126,6 +214,7 @@ class ARM_Disasm { static std::string DisassembleBX(uint32_t insn); static std::string DisassembleBKPT(uint32_t insn); static std::string DisassembleCLZ(uint32_t insn); + static std::string DisassembleMediaMulDiv(Opcode opcode, uint32_t insn); static std::string DisassembleMemblock(Opcode opcode, uint32_t insn); static std::string DisassembleMem(uint32_t insn); static std::string DisassembleMemHalf(uint32_t insn); @@ -135,7 +224,15 @@ class ARM_Disasm { static std::string DisassembleMUL(Opcode opcode, uint32_t insn); static std::string DisassembleMRS(uint32_t insn); static std::string DisassembleMSR(uint32_t insn); + static std::string DisassembleNoOperands(Opcode opcode, uint32_t insn); + static std::string DisassembleParallelAddSub(Opcode opcode, uint32_t insn); + static std::string DisassemblePKH(uint32_t insn); static std::string DisassemblePLD(uint32_t insn); + static std::string DisassembleREV(Opcode opcode, uint32_t insn); + static std::string DisassembleREX(Opcode opcode, uint32_t insn); + static std::string DisassembleSAT(Opcode opcode, uint32_t insn); + static std::string DisassembleSEL(uint32_t insn); static std::string DisassembleSWI(uint32_t insn); static std::string DisassembleSWP(Opcode opcode, uint32_t insn); + static std::string DisassembleXT(Opcode opcode, uint32_t insn); }; |