diff options
| author |  bunnei <bunneidev@gmail.com> | 2014-12-03 01:04:22 -0500 |
|---|---|---|
| committer | bunnei <bunneidev@gmail.com> | 2014-12-09 19:07:14 -0500 |
| commit | f94d8f960361e36c5436717924bda5a3a6c6d47a (patch) | |
| tree | ecad0fa27f48e672af06218ef850c9ae673147a3 /src/video_core/command_processor.cpp | |
| parent | e90b37b9358e9dcc8279b0071fd53968c1f441e8 (diff) | |
GSP: Trigger GPU interrupts at more accurate locations.
Diffstat (limited to 'src/video_core/command_processor.cpp')
| -rw-r--r-- | src/video_core/command_processor.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/video_core/command_processor.cpp b/src/video_core/command_processor.cpp index 585323a8..431139cc 100644 --- a/src/video_core/command_processor.cpp +++ b/src/video_core/command_processor.cpp @@ -8,6 +8,7 @@ #include "pica.h" #include "primitive_assembly.h" #include "vertex_shader.h" +#include "core/hle/service/gsp_gpu.h" #include "debug_utils/debug_utils.h" @@ -40,6 +41,11 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) { DebugUtils::OnPicaRegWrite(id, registers[id]); switch(id) { + // Trigger IRQ + case PICA_REG_INDEX(trigger_irq): + GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::P3D); + return; + // It seems like these trigger vertex rendering case PICA_REG_INDEX(trigger_draw): case PICA_REG_INDEX(trigger_draw_indexed): |