GPU: Emulate memory fills.

2 files changed, 80 insertions, 2 deletions

diff --git a/src/core/hw/gpu.cpp b/src/core/hw/gpu.cpp
index fad3439c..230a12d4 100644
--- a/src/core/hw/gpu.cpp
+++ b/src/core/hw/gpu.cpp
@@ -84,6 +84,26 @@ const u8* GetFramebufferPointer(const u32 address) {
 template <typename T>
 inline void Read(T &var, const u32 addr) {
     switch (addr) {
+    case Registers::MemoryFillStart1:
+    case Registers::MemoryFillStart2:
+        var = g_regs.memory_fill[(addr - Registers::MemoryFillStart1) / 0x10].address_start;
+        break;
+
+    case Registers::MemoryFillEnd1:
+    case Registers::MemoryFillEnd2:
+        var = g_regs.memory_fill[(addr - Registers::MemoryFillEnd1) / 0x10].address_end;
+        break;
+
+    case Registers::MemoryFillSize1:
+    case Registers::MemoryFillSize2:
+        var = g_regs.memory_fill[(addr - Registers::MemoryFillSize1) / 0x10].size;
+        break;
+
+    case Registers::MemoryFillValue1:
+    case Registers::MemoryFillValue2:
+        var = g_regs.memory_fill[(addr - Registers::MemoryFillValue1) / 0x10].value;
+        break;
+
     case Registers::FramebufferTopSize:
         var = g_regs.top_framebuffer.size;
         break;
@@ -194,6 +214,40 @@ inline void Read(T &var, const u32 addr) {
 template <typename T>
 inline void Write(u32 addr, const T data) {
     switch (static_cast<Registers::Id>(addr)) {
+    case Registers::MemoryFillStart1:
+    case Registers::MemoryFillStart2:
+        g_regs.memory_fill[(addr - Registers::MemoryFillStart1) / 0x10].address_start = data;
+        break;
+
+    case Registers::MemoryFillEnd1:
+    case Registers::MemoryFillEnd2:
+        g_regs.memory_fill[(addr - Registers::MemoryFillEnd1) / 0x10].address_end = data;
+        break;
+
+    case Registers::MemoryFillSize1:
+    case Registers::MemoryFillSize2:
+        g_regs.memory_fill[(addr - Registers::MemoryFillSize1) / 0x10].size = data;
+        break;
+
+    case Registers::MemoryFillValue1:
+    case Registers::MemoryFillValue2:
+    {
+        Registers::MemoryFillConfig& config = g_regs.memory_fill[(addr - Registers::MemoryFillValue1) / 0x10];
+        config.value = data;
+
+        // TODO: Not sure if this check should be done at GSP level instead
+        if (config.address_start) {
+            // TODO: Not sure if this algorithm is correct, particularly because it doesn't use the size member at all
+            u32* start = (u32*)Memory::GetPointer(config.GetStartAddress());
+            u32* end = (u32*)Memory::GetPointer(config.GetEndAddress());
+            for (u32* ptr = start; ptr < end; ++ptr)
+                *ptr = bswap32(config.value); // TODO: This is just a workaround to missing framebuffer format emulation
+
+            DEBUG_LOG(GPU, "MemoryFill from %x to %x", config.GetStartAddress(), config.GetEndAddress());
+        }
+        break;
+    }
+
     // TODO: Framebuffer registers!!
     case Registers::FramebufferTopSwapBuffers:
         g_regs.top_framebuffer.active_fb = data;
@@ -240,8 +294,6 @@ inline void Write(u32 addr, const T data) {
                        g_regs.display_transfer.output_width * 4);
             }
 
-            // Clear previous contents until we implement proper buffer clearing
-            memset(source_pointer, 0x20, g_regs.display_transfer.input_width*g_regs.display_transfer.input_height*4);
             DEBUG_LOG(GPU, "DisplayTriggerTransfer: %x bytes from %x(%xx%x)-> %x(%xx%x), dst format %x",
                       g_regs.display_transfer.output_height * g_regs.display_transfer.output_width * 4,
                       g_regs.display_transfer.GetPhysicalInputAddress(), (int)g_regs.display_transfer.input_width, (int)g_regs.display_transfer.input_height,
diff --git a/src/core/hw/gpu.h b/src/core/hw/gpu.h
index 50c36081..47d7fcb2 100644
--- a/src/core/hw/gpu.h
+++ b/src/core/hw/gpu.h
@@ -14,6 +14,15 @@ static const u32 kFrameTicks    = kFrameCycles / 3; ///< Approximate number of i
 
 struct Registers {
     enum Id : u32 {
+        MemoryFillStart1          = 0x1EF00010,
+        MemoryFillEnd1            = 0x1EF00014,
+        MemoryFillSize1           = 0x1EF00018,
+        MemoryFillValue1          = 0x1EF0001C,
+        MemoryFillStart2          = 0x1EF00020,
+        MemoryFillEnd2            = 0x1EF00024,
+        MemoryFillSize2           = 0x1EF00028,
+        MemoryFillValue2          = 0x1EF0002C,
+
         FramebufferTopSize        = 0x1EF0045C,
         FramebufferTopLeft1       = 0x1EF00468,   // Main LCD, first framebuffer for 3D left
         FramebufferTopLeft2       = 0x1EF0046C,   // Main LCD, second framebuffer for 3D left
@@ -53,6 +62,23 @@ struct Registers {
         RGBA4  = 4,
     };
 
+    struct MemoryFillConfig {
+        u32 address_start;
+        u32 address_end; // ?
+        u32 size;
+        u32 value; // ?
+
+        inline u32 GetStartAddress() const {
+            return address_start * 8;
+        }
+
+        inline u32 GetEndAddress() const {
+            return address_end * 8;
+        }
+    };
+
+    MemoryFillConfig memory_fill[2];
+
     // TODO: Move these into the framebuffer struct
     u32 framebuffer_top_left_1;
     u32 framebuffer_top_left_2;