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authorGravatar Tony Wasserka <NeoBrainX@gmail.com>2014-06-01 00:08:00 +0200
committerGravatar Tony Wasserka <NeoBrainX@gmail.com>2014-07-23 00:33:08 +0200
commit16bbc4f81b89462ff1c9e9364e0ca7ee1289c3b3 (patch)
tree31b0a53d80f519d543b8ec47d8b937c70fea2cda /src/core/hw/gpu.h
parentec9511e1db1f7ff0c2a8f86916937ea5736cdcf6 (diff)
GPU: Add display transfer configuration.
Diffstat (limited to 'src/core/hw/gpu.h')
-rw-r--r--src/core/hw/gpu.h40
1 files changed, 40 insertions, 0 deletions
diff --git a/src/core/hw/gpu.h b/src/core/hw/gpu.h
index 58058d73..29eb7ed8 100644
--- a/src/core/hw/gpu.h
+++ b/src/core/hw/gpu.h
@@ -5,6 +5,7 @@
#pragma once
#include "common/common_types.h"
+#include "common/bit_field.h"
namespace GPU {
@@ -44,6 +45,45 @@ struct Registers {
u32 framebuffer_sub_right_1;
u32 framebuffer_sub_right_2;
+ struct {
+ u32 input_address;
+ u32 output_address;
+
+ inline u32 GetPhysicalInputAddress() const {
+ return input_address * 8;
+ }
+
+ inline u32 GetPhysicalOutputAddress() const {
+ return output_address * 8;
+ }
+
+ union {
+ u32 output_size;
+
+ BitField< 0, 16, u32> output_width;
+ BitField<16, 16, u32> output_height;
+ };
+
+ union {
+ u32 input_size;
+
+ BitField< 0, 16, u32> input_width;
+ BitField<16, 16, u32> input_height;
+ };
+
+ union {
+ u32 flags;
+
+ BitField< 0, 1, u32> flip_data;
+ BitField< 8, 3, u32> input_format;
+ BitField<12, 3, u32> output_format;
+ BitField<16, 1, u32> output_tiled;
+ };
+
+ u32 unknown;
+ u32 trigger;
+ } display_transfer;
+
u32 command_list_size;
u32 command_list_address;
u32 command_processing_enabled;