armmmu: Remove unnecessary enum values

We don't need to care about XScale or Intel specific ARM stuff.

1 files changed, 20 insertions, 30 deletions

diff --git a/src/core/arm/skyeye_common/armmmu.h b/src/core/arm/skyeye_common/armmmu.h
index 0f9eadaf..22e564c3 100644
--- a/src/core/arm/skyeye_common/armmmu.h
+++ b/src/core/arm/skyeye_common/armmmu.h
@@ -26,36 +26,26 @@
 // Register numbers in the MMU
 enum
 {
-	MMU_ID = 0,
-	MMU_CONTROL = 1,
-	MMU_TRANSLATION_TABLE_BASE = 2,
-	MMU_DOMAIN_ACCESS_CONTROL = 3,
-	MMU_FAULT_STATUS = 5,
-	MMU_FAULT_ADDRESS = 6,
-	MMU_CACHE_OPS = 7,
-	MMU_TLB_OPS = 8,
-	MMU_CACHE_LOCKDOWN = 9,
-	MMU_TLB_LOCKDOWN = 10,
-	MMU_PID = 13,
-
-	// MMU_V4
-	MMU_V4_CACHE_OPS = 7,
-	MMU_V4_TLB_OPS = 8,
-
-	// MMU_V3
-	MMU_V3_FLUSH_TLB = 5,
-	MMU_V3_FLUSH_TLB_ENTRY = 6,
-	MMU_V3_FLUSH_CACHE = 7,
-
-	// MMU Intel SA-1100
-	MMU_SA_RB_OPS = 9,
-	MMU_SA_DEBUG = 14,
-	MMU_SA_CP15_R15 = 15,
-
-	// Intel xscale CP15
-	XSCALE_CP15_CACHE_TYPE = 0,
-	XSCALE_CP15_AUX_CONTROL = 1,
-	XSCALE_CP15_COPRO_ACCESS = 15,
+    MMU_ID = 0,
+    MMU_CONTROL = 1,
+    MMU_TRANSLATION_TABLE_BASE = 2,
+    MMU_DOMAIN_ACCESS_CONTROL = 3,
+    MMU_FAULT_STATUS = 5,
+    MMU_FAULT_ADDRESS = 6,
+    MMU_CACHE_OPS = 7,
+    MMU_TLB_OPS = 8,
+    MMU_CACHE_LOCKDOWN = 9,
+    MMU_TLB_LOCKDOWN = 10,
+    MMU_PID = 13,
+
+    // MMU_V4
+    MMU_V4_CACHE_OPS = 7,
+    MMU_V4_TLB_OPS = 8,
+
+    // MMU_V3
+    MMU_V3_FLUSH_TLB = 5,
+    MMU_V3_FLUSH_TLB_ENTRY = 6,
+    MMU_V3_FLUSH_CACHE = 7,
 };
 
 // Reads data in big/little endian format based on the