diff options
author | bunnei <bunneidev@gmail.com> | 2015-07-25 23:12:34 -0400 |
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committer | bunnei <bunneidev@gmail.com> | 2015-07-25 23:12:34 -0400 |
commit | 392c7feba0cd152e46ffbe6089def35082fa2692 (patch) | |
tree | d959d1751d99a6f5307b45d04e46c19c53d5efc2 /src/core/arm/skyeye_common/armsupp.h | |
parent | 453764aefc3b822d08dae3642fab83ea1adf2bc8 (diff) | |
parent | 03213f893e7f2cbd692144334ac72d9138fd5e70 (diff) |
Merge pull request #990 from lioncash/arm
dyncom: General cleanup
Diffstat (limited to 'src/core/arm/skyeye_common/armsupp.h')
-rw-r--r-- | src/core/arm/skyeye_common/armsupp.h | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/src/core/arm/skyeye_common/armsupp.h b/src/core/arm/skyeye_common/armsupp.h new file mode 100644 index 00000000..5cf1cd1d --- /dev/null +++ b/src/core/arm/skyeye_common/armsupp.h @@ -0,0 +1,40 @@ +// Copyright 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version +// Refer to the license.txt file included. + +#pragma once + +#include "common/common_types.h" + +struct ARMul_State; + +#define BITS(s, a, b) ((s << ((sizeof(s) * 8 - 1) - b)) >> (sizeof(s) * 8 - b + a - 1)) +#define BIT(s, n) ((s >> (n)) & 1) + +#define POS(i) ( (~(i)) >> 31 ) +#define NEG(i) ( (i) >> 31 ) + +bool AddOverflow(u32, u32, u32); +bool SubOverflow(u32, u32, u32); + +u32 AddWithCarry(u32, u32, u32, bool*, bool*); +bool ARMul_AddOverflowQ(u32, u32); + +u8 ARMul_SignedSaturatedAdd8(u8, u8); +u8 ARMul_SignedSaturatedSub8(u8, u8); +u16 ARMul_SignedSaturatedAdd16(u16, u16); +u16 ARMul_SignedSaturatedSub16(u16, u16); + +u8 ARMul_UnsignedSaturatedAdd8(u8, u8); +u16 ARMul_UnsignedSaturatedAdd16(u16, u16); +u8 ARMul_UnsignedSaturatedSub8(u8, u8); +u16 ARMul_UnsignedSaturatedSub16(u16, u16); +u8 ARMul_UnsignedAbsoluteDifference(u8, u8); +u32 ARMul_SignedSatQ(s32, u8, bool*); +u32 ARMul_UnsignedSatQ(s32, u8, bool*); + +bool InBigEndianMode(ARMul_State*); +bool InAPrivilegedMode(ARMul_State*); + +u32 ReadCP15Register(ARMul_State* cpu, u32 crn, u32 opcode_1, u32 crm, u32 opcode_2); +void WriteCP15Register(ARMul_State* cpu, u32 value, u32 crn, u32 opcode_1, u32 crm, u32 opcode_2); |