diff options
author | Kevin Hartman <kevin@hart.mn> | 2015-01-05 02:17:00 -0500 |
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committer | Kevin Hartman <kevin@hart.mn> | 2015-01-05 22:29:51 -0500 |
commit | 8132c01830c9e71e75e6bc1e365326cf07c5b00f (patch) | |
tree | ad7c0dc3e66c477a42280a9672d68d0be48607cc /src/core/arm/skyeye_common/armdefs.h | |
parent | 9ac2272e25cb85d096361d018a902d75c513c811 (diff) |
Added exclusive reservation granule from ARMv7 spec to dyncom to protect LDR/STREX.
Diffstat (limited to 'src/core/arm/skyeye_common/armdefs.h')
-rw-r--r-- | src/core/arm/skyeye_common/armdefs.h | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h index c2c78cd5..4592c580 100644 --- a/src/core/arm/skyeye_common/armdefs.h +++ b/src/core/arm/skyeye_common/armdefs.h @@ -162,20 +162,20 @@ struct ARMul_State unsigned ErrorCode; /* type of illegal instruction */ /* Order of the following register should not be modified */ - ARMword Reg[16]; /* the current register file */ - ARMword Cpsr; /* the current psr */ + ARMword Reg[16]; /* the current register file */ + ARMword Cpsr; /* the current psr */ ARMword Spsr_copy; ARMword phys_pc; ARMword Reg_usr[2]; - ARMword Reg_svc[2]; /* R13_SVC R14_SVC */ - ARMword Reg_abort[2]; /* R13_ABORT R14_ABORT */ - ARMword Reg_undef[2]; /* R13 UNDEF R14 UNDEF */ - ARMword Reg_irq[2]; /* R13_IRQ R14_IRQ */ - ARMword Reg_firq[7]; /* R8---R14 FIRQ */ - ARMword Spsr[7]; /* the exception psr's */ - ARMword Mode; /* the current mode */ - ARMword Bank; /* the current register bank */ - ARMword exclusive_tag; + ARMword Reg_svc[2]; /* R13_SVC R14_SVC */ + ARMword Reg_abort[2]; /* R13_ABORT R14_ABORT */ + ARMword Reg_undef[2]; /* R13 UNDEF R14 UNDEF */ + ARMword Reg_irq[2]; /* R13_IRQ R14_IRQ */ + ARMword Reg_firq[7]; /* R8---R14 FIRQ */ + ARMword Spsr[7]; /* the exception psr's */ + ARMword Mode; /* the current mode */ + ARMword Bank; /* the current register bank */ + ARMword exclusive_tag; /* the address for which the local monitor is in exclusive access mode */ ARMword exclusive_state; ARMword exclusive_result; ARMword CP15[VFP_BASE - CP15_BASE]; |