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authorGravatar Lioncash <mathew1800@gmail.com>2014-12-22 23:28:41 -0500
committerGravatar Lioncash <mathew1800@gmail.com>2014-12-22 23:52:05 -0500
commitf66d3569389e7e8a364a654d5254a2b9cc1cf8cc (patch)
tree6d4ec9eaae8738f77951d5424885a7930ce5fdf8 /src/core/arm/interpreter
parent8e2accd9746d33116c6398e6f30db5b8b4e1f188 (diff)
armemu: Fix SEL
Needs to use the updated state of the CPSR.
Diffstat (limited to 'src/core/arm/interpreter')
-rw-r--r--src/core/arm/interpreter/armemu.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp
index d19d3a49..81a4fdb9 100644
--- a/src/core/arm/interpreter/armemu.cpp
+++ b/src/core/arm/interpreter/armemu.cpp
@@ -6153,7 +6153,7 @@ L_stm_s_takeabort:
u32 rm = (instr >> 0) & 0xF;
u32 from = state->Reg[rn];
u32 to = state->Reg[rm];
- u32 cpsr = state->Cpsr;
+ u32 cpsr = ARMul_GetCPSR(state);
if ((instr & 0xFF0) == 0xFB0) { // SEL
u32 result;
if (cpsr & (1 << 16))