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authorGravatar bunnei <ericbunnie@gmail.com>2014-04-25 15:57:32 -0400
committerGravatar bunnei <ericbunnie@gmail.com>2014-04-25 15:57:32 -0400
commit6151e26958fa243b6322a9a544446dda5020204b (patch)
tree65065ba89fb911837148202811c6df9956a8a060 /src/core/arm/interpreter/armsupp.cpp
parent2672e7d88361528c9b2748114f6874d3474cb4da (diff)
added disassembly to unimplemented instruction
Diffstat (limited to 'src/core/arm/interpreter/armsupp.cpp')
-rw-r--r--src/core/arm/interpreter/armsupp.cpp7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp
index 101b9807..48e55c63 100644
--- a/src/core/arm/interpreter/armsupp.cpp
+++ b/src/core/arm/interpreter/armsupp.cpp
@@ -17,9 +17,11 @@
#include "armdefs.h"
#include "armemu.h"
+
//#include "ansidecl.h"
#include "skyeye_defs.h"
#include "core/hle/hle.h"
+#include "core/arm/disassembler/arm_disasm.h"
unsigned xscale_cp15_cp_access_allowed (ARMul_State * state, unsigned reg,
unsigned cpnum);
@@ -846,7 +848,10 @@ ARMul_CDP (ARMul_State * state, ARMword instr)
void
ARMul_UndefInstr (ARMul_State * state, ARMword instr)
{
- ERROR_LOG(ARM11, "Undefined instruction!! Instr: 0x%x", instr);
+ char buff[512];
+ ARM_Disasm disasm = ARM_Disasm();
+ disasm.disasm(state->pc, instr, buff);
+ ERROR_LOG(ARM11, "Undefined instruction!! Disasm: %s Opcode: 0x%x", buff, instr);
ARMul_Abort (state, ARMul_UndefinedInstrV);
}