diff options
| author |  Lioncash <mathew1800@gmail.com> | 2015-04-06 09:25:11 -0400 |
|---|---|---|
| committer | Lioncash <mathew1800@gmail.com> | 2015-04-06 09:26:04 -0400 |
| commit | 23dd2ca8a6757d356cbc7954a431bfc227ec6d9a (patch) | |
| tree | 6411f282ef284b033ab14452bd1d6a41701fd065 /src/core/arm/interpreter/armsupp.cpp | |
| parent | e628ed481079d26cad4980f5094dbca16bae96c8 (diff) | |
dyncom: Properly return the value of the user RO thread register
Diffstat (limited to 'src/core/arm/interpreter/armsupp.cpp')
| -rw-r--r-- | src/core/arm/interpreter/armsupp.cpp | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp index 6a11a580..f28fd8c9 100644 --- a/src/core/arm/interpreter/armsupp.cpp +++ b/src/core/arm/interpreter/armsupp.cpp @@ -227,11 +227,8 @@ u32 ReadCP15Register(ARMul_State* cpu, u32 crn, u32 opcode_1, u32 crm, u32 opcod if (opcode_2 == 2) return cpu->CP15[CP15(CP15_THREAD_UPRW)]; - // TODO: Whenever TLS is implemented, this should return - // "cpu->CP15[CP15(CP15_THREAD_URO)];" - // which contains the address of the 0x200-byte TLS if (opcode_2 == 3) - return Memory::KERNEL_MEMORY_VADDR; + return cpu->CP15[CP15(CP15_THREAD_URO)]; } if (InAPrivilegedMode(cpu)) |