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| author |  darkf <lw9k123@gmail.com> | 2014-12-29 19:47:41 -0800 |
|---|---|---|
| committer | darkf <lw9k123@gmail.com> | 2014-12-29 19:47:41 -0800 |
| commit | 8ba9ac0f74abb0408a26207a76a0c1808bad8de0 (patch) | |
| tree | f1c7c3393fa726435b5b90bf335567c93e528ef1 /src/core/arm/dyncom/arm_dyncom_dec.h | |
| parent | a19354acedbfeafd28219c48a1ec32f76dd17a54 (diff) | |
| parent | 3d14eb285382740b144e5b047cb2ad072f6129ea (diff) | |
Fix merge conflicts
Diffstat (limited to 'src/core/arm/dyncom/arm_dyncom_dec.h')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_dec.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_dec.h b/src/core/arm/dyncom/arm_dyncom_dec.h index 19d94f36..70eb96e9 100644 --- a/src/core/arm/dyncom/arm_dyncom_dec.h +++ b/src/core/arm/dyncom/arm_dyncom_dec.h @@ -56,8 +56,6 @@ #define RN ((instr >> 16) & 0xF) /*xxxx xxxx xxxx xxxx xxxx xxxx xxxx 1111 */ #define RM (instr & 0xF) -#define BIT(n) ((instr >> (n)) & 1) -#define BITS(a,b) ((instr >> (a)) & ((1 << (1+(b)-(a)))-1)) /* CP15 registers */ #define OPCODE_1 BITS(21, 23) |