Merge pull request #322 from chinhodado/master

More warning cleanups

7 files changed, 21 insertions, 18 deletions

diff --git a/src/common/bit_field.h b/src/common/bit_field.h
index c38a3fb0..8eab054b 100644
--- a/src/common/bit_field.h
+++ b/src/common/bit_field.h
@@ -168,6 +168,12 @@ public:
         }
     }
 
+    // TODO: we may want to change this to explicit operator bool() if it's bug-free in VS2015
+    __forceinline bool ToBool() const
+    {
+        return Value() != 0;
+    }
+
 private:
     // StorageType is T for non-enum types and the underlying type of T if
     // T is an enumeration. Note that T is wrapped within an enable_if in the
diff --git a/src/core/arm/dyncom/arm_dyncom_dec.h b/src/core/arm/dyncom/arm_dyncom_dec.h
index 19d94f36..70eb96e9 100644
--- a/src/core/arm/dyncom/arm_dyncom_dec.h
+++ b/src/core/arm/dyncom/arm_dyncom_dec.h
@@ -56,8 +56,6 @@
 #define RN ((instr >> 16) & 0xF)
 /*xxxx xxxx xxxx xxxx xxxx xxxx xxxx 1111 */
 #define RM (instr & 0xF)
-#define BIT(n) ((instr >> (n)) & 1)
-#define BITS(a,b) ((instr >> (a)) & ((1 << (1+(b)-(a)))-1))
 
 /* CP15 registers */
 #define OPCODE_1        BITS(21, 23)
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
index df698e8f..ae407585 100644
--- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
@@ -3798,9 +3798,9 @@ unsigned InterpreterMainLoop(ARMul_State* state)
 	#define INC_ICOUNTER			cpu->icounter++;                                                   \
 						if(cpu->Reg[15] > 0xc0000000) 					\
 							cpu->kernel_icounter++;
-						//if (debug_function(core))                                          \
+						/*if (debug_function(core))                                          \
 							if (core->check_int_flag)                                  \
-								goto END
+								goto END*/
 						//LOG_TRACE(Core_ARM11, "icounter is %llx pc is %x\n", cpu->icounter, cpu->Reg[15])
 	#else
 	#define INC_ICOUNTER			;                                                   
@@ -4021,18 +4021,18 @@ unsigned InterpreterMainLoop(ARMul_State* state)
 
 	#define UPDATE_NFLAG(dst)		(cpu->NFlag = BIT(dst, 31) ? 1 : 0)
 	#define UPDATE_ZFLAG(dst)		(cpu->ZFlag = dst ? 0 : 1)
-//	#define UPDATE_CFLAG(dst, lop, rop)	(cpu->CFlag = ((ISNEG(lop) && ISPOS(rop)) ||                        \
+/*	#define UPDATE_CFLAG(dst, lop, rop)	(cpu->CFlag = ((ISNEG(lop) && ISPOS(rop)) ||                        \
 								(ISNEG(lop) && ISPOS(dst)) ||                       \
-								(ISPOS(rop) && ISPOS(dst))))
+								(ISPOS(rop) && ISPOS(dst)))) */
 	#define UPDATE_CFLAG(dst, lop, rop)	(cpu->CFlag = ((dst < lop) || (dst < rop)))
 	#define UPDATE_CFLAG_CARRY_FROM_ADD(lop, rop, flag)	(cpu->CFlag = (((uint64_t) lop + (uint64_t) rop + (uint64_t) flag) > 0xffffffff) )
 	#define UPDATE_CFLAG_NOT_BORROW_FROM_FLAG(lop, rop, flag) (cpu->CFlag = ((uint64_t) lop >= ((uint64_t) rop + (uint64_t) flag)))
 	#define UPDATE_CFLAG_NOT_BORROW_FROM(lop, rop)	(cpu->CFlag = (lop >= rop))
 	#define UPDATE_CFLAG_WITH_NOT(dst, lop, rop)	(cpu->CFlag = !(dst < lop))
 	#define UPDATE_CFLAG_WITH_SC		cpu->CFlag = cpu->shifter_carry_out
-//	#define UPDATE_CFLAG_WITH_NOT(dst, lop, rop)	cpu->CFlag = !((ISNEG(lop) && ISPOS(rop)) ||                        \
+/*	#define UPDATE_CFLAG_WITH_NOT(dst, lop, rop)	cpu->CFlag = !((ISNEG(lop) && ISPOS(rop)) ||                        \
 								(ISNEG(lop) && ISPOS(dst)) ||                       \
-								(ISPOS(rop) && ISPOS(dst)))
+								(ISPOS(rop) && ISPOS(dst))) */
 	#define UPDATE_VFLAG(dst, lop, rop)	(cpu->VFlag = (((lop < 0) && (rop < 0) && (dst >= 0)) ||            \
 								((lop >= 0) && (rop) >= 0 && (dst < 0))))
 	#define UPDATE_VFLAG_WITH_NOT(dst, lop, rop)	(cpu->VFlag = !(((lop < 0) && (rop < 0) && (dst >= 0)) ||            \
diff --git a/src/core/arm/dyncom/arm_dyncom_run.cpp b/src/core/arm/dyncom/arm_dyncom_run.cpp
index a2026cbf..b66b92cf 100644
--- a/src/core/arm/dyncom/arm_dyncom_run.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_run.cpp
@@ -29,7 +29,6 @@
 
 void switch_mode(arm_core_t *core, uint32_t mode)
 {
-    uint32_t tmp1, tmp2;
     if (core->Mode == mode) {
         //Mode not changed.
         //printf("mode not changed\n");
diff --git a/src/core/hle/service/apt_u.cpp b/src/core/hle/service/apt_u.cpp
index b9edf032..fecc6e6f 100644
--- a/src/core/hle/service/apt_u.cpp
+++ b/src/core/hle/service/apt_u.cpp
@@ -315,8 +315,8 @@ Interface::Interface() {
 
     if (file.IsOpen()) {
         // Read shared font data
-        shared_font.resize(file.GetSize());
-        file.ReadBytes(shared_font.data(), file.GetSize());
+        shared_font.resize((size_t)file.GetSize());
+        file.ReadBytes(shared_font.data(), (size_t)file.GetSize());
 
         // Create shared font memory object
         shared_font_mem = Kernel::CreateSharedMemory("APT_U:shared_font_mem");
diff --git a/src/video_core/command_processor.cpp b/src/video_core/command_processor.cpp
index ea29e502..2083357f 100644
--- a/src/video_core/command_processor.cpp
+++ b/src/video_core/command_processor.cpp
@@ -90,7 +90,7 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) {
             const auto& index_info = registers.index_array;
             const u8* index_address_8 = Memory::GetPointer(PAddrToVAddr(base_address + index_info.offset));
             const u16* index_address_16 = (u16*)index_address_8;
-            bool index_u16 = (bool)index_info.format;
+            bool index_u16 = index_info.format != 0;
 
             DebugUtils::GeometryDumper geometry_dumper;
             PrimitiveAssembler<VertexShader::OutputVertex> clipper_primitive_assembler(registers.triangle_topology.Value());
@@ -164,7 +164,7 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) {
 
         case PICA_REG_INDEX(vs_bool_uniforms):
             for (unsigned i = 0; i < 16; ++i)
-                VertexShader::GetBoolUniform(i) = (registers.vs_bool_uniforms.Value() & (1 << i));
+                VertexShader::GetBoolUniform(i) = (registers.vs_bool_uniforms.Value() & (1 << i)) != 0;
 
             break;
 
diff --git a/src/video_core/pica.h b/src/video_core/pica.h
index 1fac9ff3..89d97e4e 100644
--- a/src/video_core/pica.h
+++ b/src/video_core/pica.h
@@ -201,9 +201,9 @@ struct Regs {
     };
     const std::array<FullTextureConfig, 3> GetTextures() const {
         return {{
-                   { static_cast<bool>(texture0_enable), texture0, texture0_format },
-                   { static_cast<bool>(texture1_enable), texture1, texture1_format },
-                   { static_cast<bool>(texture2_enable), texture2, texture2_format }
+                   { texture0_enable.ToBool(), texture0, texture0_format },
+                   { texture1_enable.ToBool(), texture1, texture1_format },
+                   { texture2_enable.ToBool(), texture2, texture2_format }
                }};
     }
 
@@ -590,11 +590,11 @@ struct Regs {
     static std::string GetCommandName(int index) {
         std::map<u32, std::string> map;
 
-        Regs regs;
         #define ADD_FIELD(name)                                                                               \
             do {                                                                                              \
                 map.insert({PICA_REG_INDEX(name), #name});                                                    \
-                for (u32 i = PICA_REG_INDEX(name) + 1; i < PICA_REG_INDEX(name) + sizeof(regs.name) / 4; ++i) \
+                /* TODO: change to Regs::name when VS2015 and other compilers support it  */                   \
+                for (u32 i = PICA_REG_INDEX(name) + 1; i < PICA_REG_INDEX(name) + sizeof(Regs().name) / 4; ++i) \
                     map.insert({i, #name + std::string("+") + std::to_string(i-PICA_REG_INDEX(name))});       \
             } while(false)