blob: a5f6b023487612744c6c57976924126f0d80af19 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
|
# Bluespec buffer bank
This is a synthesizable 8-element buffer bank written in Bluespec SystemVerilog
(BSV). It’s a reasonable Bluespec ‘hello world’ example.
The included constraints file targets the [Digilent Nexys4] development board,
but you should be able to easily modify it to work with any FPGA.
## Licence
This program is free software: you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free Software
Foundation, either version 3 of the License, or (at your option) any later
version.
This program is distributed in the hope that it will be useful, but **without
any warranty**; without even the implied warranty of **merchantability** or
**fitness for a particular purpose**. See the GNU General Public License for
more details.
You should have received a copy of the GNU General Public License along with
this program. If not, see <http://www.gnu.org/licenses/>.
[Digilent Nexys4]: http://www.digilentinc.com/Products/Detail.cfm?Prod=NEXYS4
|
