From 63f413ce94358e3e76dca66218c7da20fec18569 Mon Sep 17 00:00:00 2001 From: djsollen Date: Fri, 18 Jul 2014 07:09:33 -0700 Subject: expand workaround to all 32-bit mips devices without the appropriate gcc support R=halcanary@google.com, reed@google.com, mtklein@google.com Author: djsollen@google.com Review URL: https://codereview.chromium.org/400753004 --- src/ports/SkAtomics_sync.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/ports/SkAtomics_sync.h b/src/ports/SkAtomics_sync.h index 635508257f..9389c00103 100644 --- a/src/ports/SkAtomics_sync.h +++ b/src/ports/SkAtomics_sync.h @@ -17,10 +17,10 @@ static inline __attribute__((always_inline)) int32_t sk_atomic_inc(int32_t* addr } static inline __attribute__((always_inline)) int64_t sk_atomic_inc(int64_t* addr) { -#if defined(SK_BUILD_FOR_ANDROID_FRAMEWORK) && defined(__mips__) && !defined(__LP64__) - /** The 32-bit MIPS toolchain for the android framework is missing support - * for __sync* functions that operate on 64-bit values. The workaround is - * to use __atomic* functions until we can move everything to . +#if defined(__mips__) && !defined(__LP64__) && !defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8) + /** Some versions of the GCC 32-bit MIPS toolchains (e.g. 4.8) for android are missing + * support for the __sync* functions that operate on 64-bit values. The workaround + * is to use __atomic* functions until we can move everything to . */ return __atomic_fetch_add(addr, 1, __ATOMIC_SEQ_CST); #else -- cgit v1.2.3