From f75f1a37513a68aa590048312c2a58b96a0a92df Mon Sep 17 00:00:00 2001 From: Yunsup Lee Date: Tue, 13 Mar 2012 22:23:06 -0700 Subject: add vvcfg,vtcfg --- inst.v | 2 ++ opcodes | 2 ++ 2 files changed, 4 insertions(+) diff --git a/inst.v b/inst.v index d0bb9f9..13b6555 100644 --- a/inst.v +++ b/inst.v @@ -238,6 +238,8 @@ `define VFMSV 32'b?????_?????_00000_0000010010_1110011 `define VFMST 32'b?????_?????_?????_0000100010_1110011 `define VFMTS 32'b?????_?????_?????_0000110010_1110011 +`define VVCFG 32'b00000_?????_?????_0000001000_1110011 +`define VTCFG 32'b00000_?????_?????_0000011000_1110011 `define VVCFGIVL 32'b?????_?????_????????????_001_1110011 `define VTCFGIVL 32'b?????_?????_????????????_011_1110011 `define VSETVL 32'b?????_?????_000000000000_101_1110011 diff --git a/opcodes b/opcodes index 99785a1..8367e47 100644 --- a/opcodes +++ b/opcodes @@ -336,6 +336,8 @@ vfmvv rd rs1 21..17=0 16..11=0 10..8=1 7=0 6..2=0x1 vfmsv rd rs1 21..17=0 16..11=1 10..8=1 7=0 6..2=0x1C 1..0=3 vfmst rd rs1 rs2 16..11=2 10..8=1 7=0 6..2=0x1C 1..0=3 vfmts rd rs1 rs2 16..11=3 10..8=1 7=0 6..2=0x1C 1..0=3 +vvcfg 31..27=0 rs1 rs2 16..11=0 10..8=4 7=0 6..2=0x1C 1..0=3 +vtcfg 31..27=0 rs1 rs2 16..11=1 10..8=4 7=0 6..2=0x1C 1..0=3 # other vector immediate instructions vvcfgivl rd rs1 imm12 9..8=0 7=1 6..2=0x1C 1..0=3 -- cgit v1.2.3