From b5770afc54cb5c445db574225d911ce330f62125 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Tue, 18 Jan 2011 17:51:52 -0800 Subject: [opcodes, sim, xcc] made *w insns illegal in RV32 now generic variants behave differently in RV32 and RV64. --- inst.v | 2 -- instr-table.tex | 18 ------------------ opcodes | 2 -- 3 files changed, 22 deletions(-) diff --git a/inst.v b/inst.v index 95996cd..472a5d9 100644 --- a/inst.v +++ b/inst.v @@ -47,8 +47,6 @@ `define SRLW 32'b?????_?????_?????_0000010111_1110111 `define SRAW 32'b?????_?????_?????_0000011111_1110111 `define MULW 32'b?????_?????_?????_0000000001_1110111 -`define MULHW 32'b?????_?????_?????_0000010001_1110111 -`define MULHUW 32'b?????_?????_?????_0000011001_1110111 `define DIVW 32'b?????_?????_?????_0000100001_1110111 `define DIVUW 32'b?????_?????_?????_0000101001_1110111 `define REMW 32'b?????_?????_?????_0000110001_1110111 diff --git a/instr-table.tex b/instr-table.tex index ec62ec0..0bbcf13 100644 --- a/instr-table.tex +++ b/instr-table.tex @@ -518,24 +518,6 @@ \cline{2-10} -& -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MULHW rd,rs1,rs2 \\ -\cline{2-10} - - -& -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MULHUW rd,rs1,rs2 \\ -\cline{2-10} - - & \multicolumn{1}{|c|}{0000000} & \multicolumn{5}{c|}{0000000000} & diff --git a/opcodes b/opcodes index 3c18de0..6b49734 100644 --- a/opcodes +++ b/opcodes @@ -65,8 +65,6 @@ srlw rd rs1 rs2 16=0 15..10=2 9..7=7 6..0=0x77 sraw rd rs1 rs2 16=0 15..10=3 9..7=7 6..0=0x77 mulw rd rs1 rs2 16..10=0 9..7=1 6..0=0x77 -mulhw rd rs1 rs2 16..10=2 9..7=1 6..0=0x77 -mulhuw rd rs1 rs2 16..10=3 9..7=1 6..0=0x77 divw rd rs1 rs2 16..10=4 9..7=1 6..0=0x77 divuw rd rs1 rs2 16..10=5 9..7=1 6..0=0x77 remw rd rs1 rs2 16..10=6 9..7=1 6..0=0x77 -- cgit v1.2.3