From a6c850798cce0d0107d1da7eac80974aff9bee9e Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Mon, 17 Jan 2011 01:13:50 -0800 Subject: [opcodes, pk, sim, xcc] removed nor, normalized macros to addi --- inst.v | 1 - instr-table.tex | 9 --------- opcodes | 1 - 3 files changed, 11 deletions(-) diff --git a/inst.v b/inst.v index b2432b1..95996cd 100644 --- a/inst.v +++ b/inst.v @@ -27,7 +27,6 @@ `define AND 32'b?????_?????_?????_0000100000_1110101 `define OR 32'b?????_?????_?????_0000101000_1110101 `define XOR 32'b?????_?????_?????_0000110000_1110101 -`define NOR 32'b?????_?????_?????_0000111000_1110101 `define SLL 32'b?????_?????_?????_0000001111_1110101 `define SRL 32'b?????_?????_?????_0000010111_1110101 `define SRA 32'b?????_?????_?????_0000011111_1110101 diff --git a/instr-table.tex b/instr-table.tex index d35d345..ec62ec0 100644 --- a/instr-table.tex +++ b/instr-table.tex @@ -332,15 +332,6 @@ \cline{2-10} -& -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & NOR rd,rs1,rs2 \\ -\cline{2-10} - - & \multicolumn{1}{|c|}{0000000} & \multicolumn{5}{c|}{0000000000} & diff --git a/opcodes b/opcodes index 7b850d1..3c18de0 100644 --- a/opcodes +++ b/opcodes @@ -41,7 +41,6 @@ sltu rd rs1 rs2 16..10=3 9..7=0 6..0=0x75 and rd rs1 rs2 16..10=4 9..7=0 6..0=0x75 or rd rs1 rs2 16..10=5 9..7=0 6..0=0x75 xor rd rs1 rs2 16..10=6 9..7=0 6..0=0x75 -nor rd rs1 rs2 16..10=7 9..7=0 6..0=0x75 sll rd rs1 rs2 16=0 15..10=1 9..7=7 6..0=0x75 srl rd rs1 rs2 16=0 15..10=2 9..7=7 6..0=0x75 sra rd rs1 rs2 16=0 15..10=3 9..7=7 6..0=0x75 -- cgit v1.2.3