From a414c8a716e8e9c7ac676e3ffaf6e072c1b9cc2e Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Tue, 11 Mar 2014 19:05:40 -0700 Subject: New FP encoding --- inst.chisel | 76 +++++----- instr-table.tex | 420 +++++++++++++++++++++++++++++++------------------------- opcodes | 134 +++++++++--------- opcodes-pseudo | 11 +- parse-opcodes | 35 +++-- 5 files changed, 367 insertions(+), 309 deletions(-) diff --git a/inst.chisel b/inst.chisel index d200281..efb1ba7 100644 --- a/inst.chisel +++ b/inst.chisel @@ -99,51 +99,51 @@ object Instructions { def FSUB_S = Bits("b0000100??????????????????1010011") def FMUL_S = Bits("b0001000??????????????????1010011") def FDIV_S = Bits("b0001100??????????????????1010011") - def FSQRT_S = Bits("b001000000000?????????????1010011") - def FSGNJ_S = Bits("b0010100??????????000?????1010011") - def FSGNJN_S = Bits("b0011000??????????000?????1010011") - def FSGNJX_S = Bits("b0011100??????????000?????1010011") + def FSGNJ_S = Bits("b0010000??????????000?????1010011") + def FSGNJN_S = Bits("b0010000??????????001?????1010011") + def FSGNJX_S = Bits("b0010000??????????010?????1010011") + def FMIN_S = Bits("b0010100??????????000?????1010011") + def FMAX_S = Bits("b0010100??????????001?????1010011") + def FSQRT_S = Bits("b010110000000?????????????1010011") def FADD_D = Bits("b0000001??????????????????1010011") def FSUB_D = Bits("b0000101??????????????????1010011") def FMUL_D = Bits("b0001001??????????????????1010011") def FDIV_D = Bits("b0001101??????????????????1010011") - def FSQRT_D = Bits("b001000100000?????????????1010011") - def FSGNJ_D = Bits("b0010101??????????000?????1010011") - def FSGNJN_D = Bits("b0011001??????????000?????1010011") - def FSGNJX_D = Bits("b0011101??????????000?????1010011") - def FCVT_L_S = Bits("b010000000000?????????????1010011") - def FCVT_LU_S = Bits("b010010000000?????????????1010011") - def FCVT_W_S = Bits("b010100000000?????????????1010011") - def FCVT_WU_S = Bits("b010110000000?????????????1010011") - def FCVT_L_D = Bits("b010000100000?????????????1010011") - def FCVT_LU_D = Bits("b010010100000?????????????1010011") - def FCVT_W_D = Bits("b010100100000?????????????1010011") - def FCVT_WU_D = Bits("b010110100000?????????????1010011") - def FCVT_S_L = Bits("b011000000000?????????????1010011") - def FCVT_S_LU = Bits("b011010000000?????????????1010011") - def FCVT_S_W = Bits("b011100000000?????????????1010011") - def FCVT_S_WU = Bits("b011110000000?????????????1010011") - def FCVT_D_L = Bits("b011000100000?????????????1010011") - def FCVT_D_LU = Bits("b011010100000?????????????1010011") - def FCVT_D_W = Bits("b011100100000?????????????1010011") - def FCVT_D_WU = Bits("b011110100000?????????????1010011") - def FCVT_S_D = Bits("b100010000000?????????????1010011") - def FCVT_D_S = Bits("b100000100000?????????????1010011") - def FEQ_S = Bits("b1010100??????????000?????1010011") - def FLT_S = Bits("b1011000??????????000?????1010011") - def FLE_S = Bits("b1011100??????????000?????1010011") - def FEQ_D = Bits("b1010101??????????000?????1010011") - def FLT_D = Bits("b1011001??????????000?????1010011") - def FLE_D = Bits("b1011101??????????000?????1010011") - def FMIN_S = Bits("b1100000??????????000?????1010011") - def FMAX_S = Bits("b1100100??????????000?????1010011") - def FMIN_D = Bits("b1100001??????????000?????1010011") - def FMAX_D = Bits("b1100101??????????000?????1010011") + def FSGNJ_D = Bits("b0010001??????????000?????1010011") + def FSGNJN_D = Bits("b0010001??????????001?????1010011") + def FSGNJX_D = Bits("b0010001??????????010?????1010011") + def FMIN_D = Bits("b0010101??????????000?????1010011") + def FMAX_D = Bits("b0010101??????????001?????1010011") + def FCVT_S_D = Bits("b010000000001?????????????1010011") + def FCVT_D_S = Bits("b010000100000?????????????1010011") + def FSQRT_D = Bits("b010110100000?????????????1010011") + def FLE_S = Bits("b1010000??????????000?????1010011") + def FLT_S = Bits("b1010000??????????001?????1010011") + def FEQ_S = Bits("b1010000??????????010?????1010011") + def FLE_D = Bits("b1010001??????????000?????1010011") + def FLT_D = Bits("b1010001??????????001?????1010011") + def FEQ_D = Bits("b1010001??????????010?????1010011") + def FCVT_W_S = Bits("b110000000000?????????????1010011") + def FCVT_WU_S = Bits("b110000000001?????????????1010011") + def FCVT_L_S = Bits("b110000000010?????????????1010011") + def FCVT_LU_S = Bits("b110000000011?????????????1010011") def FMV_X_S = Bits("b111000000000?????000?????1010011") + def FCLASS_S = Bits("b111000000000?????001?????1010011") + def FCVT_W_D = Bits("b110000100000?????????????1010011") + def FCVT_WU_D = Bits("b110000100001?????????????1010011") + def FCVT_L_D = Bits("b110000100010?????????????1010011") + def FCVT_LU_D = Bits("b110000100011?????????????1010011") def FMV_X_D = Bits("b111000100000?????000?????1010011") - def FCLASS_S = Bits("b111010000000?????000?????1010011") - def FCLASS_D = Bits("b111010100000?????000?????1010011") + def FCLASS_D = Bits("b111000100000?????001?????1010011") + def FCVT_S_W = Bits("b110100000000?????????????1010011") + def FCVT_S_WU = Bits("b110100000001?????????????1010011") + def FCVT_S_L = Bits("b110100000010?????????????1010011") + def FCVT_S_LU = Bits("b110100000011?????????????1010011") def FMV_S_X = Bits("b111100000000?????000?????1010011") + def FCVT_D_W = Bits("b110100100000?????????????1010011") + def FCVT_D_WU = Bits("b110100100001?????????????1010011") + def FCVT_D_L = Bits("b110100100010?????????????1010011") + def FCVT_D_LU = Bits("b110100100011?????????????1010011") def FMV_D_X = Bits("b111100100000?????000?????1010011") def FLW = Bits("b?????????????????010?????0000111") def FLD = Bits("b?????????????????011?????0000111") diff --git a/instr-table.tex b/instr-table.tex index 4163144..3e881ea 100644 --- a/instr-table.tex +++ b/instr-table.tex @@ -300,8 +300,8 @@ & -\multicolumn{3}{|c|}{000000} & -\multicolumn{3}{c|}{shamt} & +\multicolumn{4}{|c|}{0000000} & +\multicolumn{2}{c|}{shamt} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{001} & \multicolumn{1}{c|}{rd} & @@ -310,8 +310,8 @@ & -\multicolumn{3}{|c|}{000000} & -\multicolumn{3}{c|}{shamt} & +\multicolumn{4}{|c|}{0000000} & +\multicolumn{2}{c|}{shamt} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{101} & \multicolumn{1}{c|}{rd} & @@ -320,8 +320,8 @@ & -\multicolumn{3}{|c|}{010000} & -\multicolumn{3}{c|}{shamt} & +\multicolumn{4}{|c|}{0100000} & +\multicolumn{2}{c|}{shamt} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{101} & \multicolumn{1}{c|}{rd} & @@ -594,6 +594,36 @@ \cline{2-11} +& +\multicolumn{3}{|c|}{000000} & +\multicolumn{3}{c|}{shamt} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{001} & +\multicolumn{1}{c|}{rd} & +\multicolumn{1}{c|}{0010011} & SLLI rd,rs1,shamt \\ +\cline{2-11} + + +& +\multicolumn{3}{|c|}{000000} & +\multicolumn{3}{c|}{shamt} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{101} & +\multicolumn{1}{c|}{rd} & +\multicolumn{1}{c|}{0010011} & SRLI rd,rs1,shamt \\ +\cline{2-11} + + +& +\multicolumn{3}{|c|}{010000} & +\multicolumn{3}{c|}{shamt} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{101} & +\multicolumn{1}{c|}{rd} & +\multicolumn{1}{c|}{0010011} & SRAI rd,rs1,shamt \\ +\cline{2-11} + + & \multicolumn{6}{|c|}{imm[11:0]} & \multicolumn{1}{c|}{rs1} & @@ -1201,246 +1231,246 @@ & -\multicolumn{4}{|c|}{0000000} & +\multicolumn{2}{|c|}{rs3} & +\multicolumn{2}{c|}{00} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FADD.S rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1000011} & FMADD.S rd,rs1,rs2,rs3 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0000100} & +\multicolumn{2}{|c|}{rs3} & +\multicolumn{2}{c|}{00} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FSUB.S rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1000111} & FMSUB.S rd,rs1,rs2,rs3 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0001000} & +\multicolumn{2}{|c|}{rs3} & +\multicolumn{2}{c|}{00} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FMUL.S rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1001011} & FNMSUB.S rd,rs1,rs2,rs3 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0001100} & +\multicolumn{2}{|c|}{rs3} & +\multicolumn{2}{c|}{00} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FDIV.S rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1001111} & FNMADD.S rd,rs1,rs2,rs3 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0010000} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{0000000} & +\multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FSQRT.S rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FADD.S rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{1100000} & +\multicolumn{4}{|c|}{0000100} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{000} & +\multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FMIN.S rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1010011} & FSUB.S rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{1100100} & +\multicolumn{4}{|c|}{0001000} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{000} & +\multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FMAX.S rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1010011} & FMUL.S rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{2}{|c|}{rs3} & -\multicolumn{2}{c|}{00} & +\multicolumn{4}{|c|}{0001100} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1000011} & FMADD.S rd,rs1,rs2,rs3 \\ +\multicolumn{1}{c|}{1010011} & FDIV.S rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{2}{|c|}{rs3} & -\multicolumn{2}{c|}{00} & -\multicolumn{2}{c|}{rs2} & +\multicolumn{4}{|c|}{0101100} & +\multicolumn{2}{c|}{00000} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1000111} & FMSUB.S rd,rs1,rs2,rs3 \\ +\multicolumn{1}{c|}{1010011} & FSQRT.S rd,rs1 \\ \cline{2-11} & -\multicolumn{2}{|c|}{rs3} & -\multicolumn{2}{c|}{00} & +\multicolumn{4}{|c|}{0010000} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{000} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1001011} & FNMSUB.S rd,rs1,rs2,rs3 \\ +\multicolumn{1}{c|}{1010011} & FSGNJ.S rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{2}{|c|}{rs3} & -\multicolumn{2}{c|}{00} & +\multicolumn{4}{|c|}{0010000} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{001} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1001111} & FNMADD.S rd,rs1,rs2,rs3 \\ +\multicolumn{1}{c|}{1010011} & FSGNJN.S rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0010100} & +\multicolumn{4}{|c|}{0010000} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{000} & +\multicolumn{1}{c|}{010} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FSGNJ.S rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1010011} & FSGNJX.S rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0011000} & +\multicolumn{4}{|c|}{0010100} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{000} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FSGNJN.S rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1010011} & FMIN.S rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0011100} & +\multicolumn{4}{|c|}{0010100} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{000} & +\multicolumn{1}{c|}{001} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FSGNJX.S rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1010011} & FMAX.S rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0111000} & +\multicolumn{4}{|c|}{1100000} & \multicolumn{2}{c|}{00000} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FCVT.S.W rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FCVT.W.S rd,rs1 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0111100} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{1100000} & +\multicolumn{2}{c|}{00001} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FCVT.S.WU rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FCVT.WU.S rd,rs1 \\ \cline{2-11} & -\multicolumn{4}{|c|}{1111000} & +\multicolumn{4}{|c|}{1110000} & \multicolumn{2}{c|}{00000} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{000} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FMV.S.X rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FMV.X.S rd,rs1 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0101000} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{1010000} & +\multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{010} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FCVT.W.S rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FEQ.S rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0101100} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{1010000} & +\multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{001} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FCVT.WU.S rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FLT.S rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{1110000} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{1010000} & +\multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{000} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FMV.X.S rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FLE.S rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{1110100} & +\multicolumn{4}{|c|}{1110000} & \multicolumn{2}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{000} & +\multicolumn{1}{c|}{001} & \multicolumn{1}{c|}{rd} & \multicolumn{1}{c|}{1010011} & FCLASS.S rd,rs1 \\ \cline{2-11} & -\multicolumn{4}{|c|}{1010100} & -\multicolumn{2}{c|}{rs2} & +\multicolumn{4}{|c|}{1101000} & +\multicolumn{2}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{000} & +\multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FEQ.S rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1010011} & FCVT.S.W rd,rs1 \\ \cline{2-11} & -\multicolumn{4}{|c|}{1011000} & -\multicolumn{2}{c|}{rs2} & +\multicolumn{4}{|c|}{1101000} & +\multicolumn{2}{c|}{00001} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{000} & +\multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FLT.S rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1010011} & FCVT.S.WU rd,rs1 \\ \cline{2-11} & -\multicolumn{4}{|c|}{1011100} & -\multicolumn{2}{c|}{rs2} & +\multicolumn{4}{|c|}{1111000} & +\multicolumn{2}{c|}{00000} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{000} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FLE.S rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1010011} & FMV.S.X rd,rs1 \\ \cline{2-11} @@ -1504,6 +1534,26 @@ \cline{2-11} +& +\multicolumn{4}{|c|}{0000000} & +\multicolumn{2}{c|}{00010} & +\multicolumn{1}{c|}{imm[4:0]} & +\multicolumn{1}{c|}{101} & +\multicolumn{1}{c|}{rd} & +\multicolumn{1}{c|}{1110011} & FSRMI rd,imm \\ +\cline{2-11} + + +& +\multicolumn{4}{|c|}{0000000} & +\multicolumn{2}{c|}{00001} & +\multicolumn{1}{c|}{imm[4:0]} & +\multicolumn{1}{c|}{101} & +\multicolumn{1}{c|}{rd} & +\multicolumn{1}{c|}{1110011} & FSFLAGSI rd,imm \\ +\cline{2-11} + + \end{tabular} \end{center} \end{small} @@ -1581,42 +1631,42 @@ & -\multicolumn{4}{|c|}{0110000} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{1100000} & +\multicolumn{2}{c|}{00010} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FCVT.S.L rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FCVT.L.S rd,rs1 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0110100} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{1100000} & +\multicolumn{2}{c|}{00011} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FCVT.S.LU rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FCVT.LU.S rd,rs1 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0100000} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{1101000} & +\multicolumn{2}{c|}{00010} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FCVT.L.S rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FCVT.S.L rd,rs1 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0100100} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{1101000} & +\multicolumn{2}{c|}{00011} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FCVT.LU.S rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FCVT.S.LU rd,rs1 \\ \cline{2-11} @@ -1647,269 +1697,259 @@ & -\multicolumn{4}{|c|}{0000001} & +\multicolumn{2}{|c|}{rs3} & +\multicolumn{2}{c|}{01} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FADD.D rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1000011} & FMADD.D rd,rs1,rs2,rs3 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0000101} & +\multicolumn{2}{|c|}{rs3} & +\multicolumn{2}{c|}{01} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FSUB.D rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1000111} & FMSUB.D rd,rs1,rs2,rs3 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0001001} & +\multicolumn{2}{|c|}{rs3} & +\multicolumn{2}{c|}{01} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FMUL.D rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1001011} & FNMSUB.D rd,rs1,rs2,rs3 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0001101} & +\multicolumn{2}{|c|}{rs3} & +\multicolumn{2}{c|}{01} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FDIV.D rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1001111} & FNMADD.D rd,rs1,rs2,rs3 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0010001} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{0000001} & +\multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FSQRT.D rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FADD.D rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{1100001} & +\multicolumn{4}{|c|}{0000101} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{000} & +\multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FMIN.D rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1010011} & FSUB.D rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{1100101} & +\multicolumn{4}{|c|}{0001001} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{000} & +\multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FMAX.D rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1010011} & FMUL.D rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{2}{|c|}{rs3} & -\multicolumn{2}{c|}{01} & +\multicolumn{4}{|c|}{0001101} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1000011} & FMADD.D rd,rs1,rs2,rs3 \\ +\multicolumn{1}{c|}{1010011} & FDIV.D rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{2}{|c|}{rs3} & -\multicolumn{2}{c|}{01} & -\multicolumn{2}{c|}{rs2} & +\multicolumn{4}{|c|}{0101101} & +\multicolumn{2}{c|}{00000} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1000111} & FMSUB.D rd,rs1,rs2,rs3 \\ +\multicolumn{1}{c|}{1010011} & FSQRT.D rd,rs1 \\ \cline{2-11} & -\multicolumn{2}{|c|}{rs3} & -\multicolumn{2}{c|}{01} & +\multicolumn{4}{|c|}{0010001} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{000} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1001011} & FNMSUB.D rd,rs1,rs2,rs3 \\ +\multicolumn{1}{c|}{1010011} & FSGNJ.D rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{2}{|c|}{rs3} & -\multicolumn{2}{c|}{01} & +\multicolumn{4}{|c|}{0010001} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{001} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1001111} & FNMADD.D rd,rs1,rs2,rs3 \\ +\multicolumn{1}{c|}{1010011} & FSGNJN.D rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0010101} & +\multicolumn{4}{|c|}{0010001} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{000} & +\multicolumn{1}{c|}{010} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FSGNJ.D rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1010011} & FSGNJX.D rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0011001} & +\multicolumn{4}{|c|}{0010101} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{000} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FSGNJN.D rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1010011} & FMIN.D rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0011101} & +\multicolumn{4}{|c|}{0010101} & \multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{000} & +\multicolumn{1}{c|}{001} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FSGNJX.D rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1010011} & FMAX.D rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0111001} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{0100000} & +\multicolumn{2}{c|}{00001} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FCVT.D.W rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FCVT.S.D rd,rs1 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0111101} & +\multicolumn{4}{|c|}{0100001} & \multicolumn{2}{c|}{00000} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FCVT.D.WU rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FCVT.D.S rd,rs1 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0101001} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{1010001} & +\multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{010} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FCVT.W.D rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FEQ.D rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0101101} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{1010001} & +\multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{001} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FCVT.WU.D rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FLT.D rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{1110101} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{1010001} & +\multicolumn{2}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{000} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FCLASS.D rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FLE.D rd,rs1,rs2 \\ \cline{2-11} & -\multicolumn{4}{|c|}{1010101} & -\multicolumn{2}{c|}{rs2} & +\multicolumn{4}{|c|}{1110001} & +\multicolumn{2}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{000} & +\multicolumn{1}{c|}{001} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FEQ.D rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1010011} & FCLASS.D rd,rs1 \\ \cline{2-11} & -\multicolumn{4}{|c|}{1011001} & -\multicolumn{2}{c|}{rs2} & +\multicolumn{4}{|c|}{1100001} & +\multicolumn{2}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{000} & +\multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FLT.D rd,rs1,rs2 \\ +\multicolumn{1}{c|}{1010011} & FCVT.W.D rd,rs1 \\ \cline{2-11} & -\multicolumn{4}{|c|}{1011101} & -\multicolumn{2}{c|}{rs2} & +\multicolumn{4}{|c|}{1100001} & +\multicolumn{2}{c|}{00001} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{000} & +\multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FLE.D rd,rs1,rs2 \\ -\cline{2-11} - - -& -\multicolumn{10}{c}{} & \\ -& -\multicolumn{10}{c}{\bf RV64D Standard Extension (in addition to RV32D)} & \\ +\multicolumn{1}{c|}{1010011} & FCVT.WU.D rd,rs1 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0110001} & +\multicolumn{4}{|c|}{1101001} & \multicolumn{2}{c|}{00000} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FCVT.D.L rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FCVT.D.W rd,rs1 \\ \cline{2-11} & -\multicolumn{4}{|c|}{0110101} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{1101001} & +\multicolumn{2}{c|}{00001} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FCVT.D.LU rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FCVT.D.WU rd,rs1 \\ \cline{2-11} & -\multicolumn{4}{|c|}{1111001} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{000} & -\multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FMV.D.X rd,rs1 \\ +\multicolumn{10}{c}{} & \\ +& +\multicolumn{10}{c}{\bf RV64D Standard Extension (in addition to RV32D)} & \\ \cline{2-11} & -\multicolumn{4}{|c|}{0100001} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{1100001} & +\multicolumn{2}{c|}{00010} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & @@ -1918,8 +1958,8 @@ & -\multicolumn{4}{|c|}{0100101} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{1100001} & +\multicolumn{2}{c|}{00011} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & @@ -1938,22 +1978,32 @@ & -\multicolumn{4}{|c|}{1000100} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{1101001} & +\multicolumn{2}{c|}{00010} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FCVT.S.D rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FCVT.D.L rd,rs1 \\ \cline{2-11} & -\multicolumn{4}{|c|}{1000001} & -\multicolumn{2}{c|}{00000} & +\multicolumn{4}{|c|}{1101001} & +\multicolumn{2}{c|}{00011} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rm} & \multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{1010011} & FCVT.D.S rd,rs1 \\ +\multicolumn{1}{c|}{1010011} & FCVT.D.LU rd,rs1 \\ +\cline{2-11} + + +& +\multicolumn{4}{|c|}{1111001} & +\multicolumn{2}{c|}{00000} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{000} & +\multicolumn{1}{c|}{rd} & +\multicolumn{1}{c|}{1010011} & FMV.D.X rd,rs1 \\ \cline{2-11} diff --git a/opcodes b/opcodes index 02e9eff..85b8dd3 100644 --- a/opcodes +++ b/opcodes @@ -124,80 +124,76 @@ csrrsi rd rs1 imm12 14..12=6 6..2=0x1C 1..0=3 csrrci rd rs1 imm12 14..12=7 6..2=0x1C 1..0=3 # F/D EXTENSIONS -fadd.s rd rs1 rs2 31..27=0x0 rm 26..25=0 6..2=0x14 1..0=3 -fsub.s rd rs1 rs2 31..27=0x1 rm 26..25=0 6..2=0x14 1..0=3 -fmul.s rd rs1 rs2 31..27=0x2 rm 26..25=0 6..2=0x14 1..0=3 -fdiv.s rd rs1 rs2 31..27=0x3 rm 26..25=0 6..2=0x14 1..0=3 -fsqrt.s rd rs1 24..20=0 31..27=0x4 rm 26..25=0 6..2=0x14 1..0=3 -fsgnj.s rd rs1 rs2 31..27=0x5 14..12=0 26..25=0 6..2=0x14 1..0=3 -fsgnjn.s rd rs1 rs2 31..27=0x6 14..12=0 26..25=0 6..2=0x14 1..0=3 -fsgnjx.s rd rs1 rs2 31..27=0x7 14..12=0 26..25=0 6..2=0x14 1..0=3 - -fadd.d rd rs1 rs2 31..27=0x0 rm 26..25=1 6..2=0x14 1..0=3 -fsub.d rd rs1 rs2 31..27=0x1 rm 26..25=1 6..2=0x14 1..0=3 -fmul.d rd rs1 rs2 31..27=0x2 rm 26..25=1 6..2=0x14 1..0=3 -fdiv.d rd rs1 rs2 31..27=0x3 rm 26..25=1 6..2=0x14 1..0=3 -fsqrt.d rd rs1 24..20=0 31..27=0x4 rm 26..25=1 6..2=0x14 1..0=3 -fsgnj.d rd rs1 rs2 31..27=0x5 14..12=0 26..25=1 6..2=0x14 1..0=3 -fsgnjn.d rd rs1 rs2 31..27=0x6 14..12=0 26..25=1 6..2=0x14 1..0=3 -fsgnjx.d rd rs1 rs2 31..27=0x7 14..12=0 26..25=1 6..2=0x14 1..0=3 - -fcvt.l.s rd rs1 24..20=0 31..27=0x8 rm 26..25=0 6..2=0x14 1..0=3 -fcvt.lu.s rd rs1 24..20=0 31..27=0x9 rm 26..25=0 6..2=0x14 1..0=3 -fcvt.w.s rd rs1 24..20=0 31..27=0xA rm 26..25=0 6..2=0x14 1..0=3 -fcvt.wu.s rd rs1 24..20=0 31..27=0xB rm 26..25=0 6..2=0x14 1..0=3 - -fcvt.l.d rd rs1 24..20=0 31..27=0x8 rm 26..25=1 6..2=0x14 1..0=3 -fcvt.lu.d rd rs1 24..20=0 31..27=0x9 rm 26..25=1 6..2=0x14 1..0=3 -fcvt.w.d rd rs1 24..20=0 31..27=0xA rm 26..25=1 6..2=0x14 1..0=3 -fcvt.wu.d rd rs1 24..20=0 31..27=0xB rm 26..25=1 6..2=0x14 1..0=3 - -fcvt.s.l rd rs1 24..20=0 31..27=0xC rm 26..25=0 6..2=0x14 1..0=3 -fcvt.s.lu rd rs1 24..20=0 31..27=0xD rm 26..25=0 6..2=0x14 1..0=3 -fcvt.s.w rd rs1 24..20=0 31..27=0xE rm 26..25=0 6..2=0x14 1..0=3 -fcvt.s.wu rd rs1 24..20=0 31..27=0xF rm 26..25=0 6..2=0x14 1..0=3 - -fcvt.d.l rd rs1 24..20=0 31..27=0xC rm 26..25=1 6..2=0x14 1..0=3 -fcvt.d.lu rd rs1 24..20=0 31..27=0xD rm 26..25=1 6..2=0x14 1..0=3 -fcvt.d.w rd rs1 24..20=0 31..27=0xE rm 26..25=1 6..2=0x14 1..0=3 -fcvt.d.wu rd rs1 24..20=0 31..27=0xF rm 26..25=1 6..2=0x14 1..0=3 - -fcvt.s.d rd rs1 24..20=0 31..29=0x4 28..27=1 rm 26..25=0 6..2=0x14 1..0=3 -fcvt.d.s rd rs1 24..20=0 31..29=0x4 28..27=0 rm 26..25=1 6..2=0x14 1..0=3 - -feq.s rd rs1 rs2 31..27=0x15 14..12=0 26..25=0 6..2=0x14 1..0=3 -flt.s rd rs1 rs2 31..27=0x16 14..12=0 26..25=0 6..2=0x14 1..0=3 -fle.s rd rs1 rs2 31..27=0x17 14..12=0 26..25=0 6..2=0x14 1..0=3 - -feq.d rd rs1 rs2 31..27=0x15 14..12=0 26..25=1 6..2=0x14 1..0=3 -flt.d rd rs1 rs2 31..27=0x16 14..12=0 26..25=1 6..2=0x14 1..0=3 -fle.d rd rs1 rs2 31..27=0x17 14..12=0 26..25=1 6..2=0x14 1..0=3 - -fmin.s rd rs1 rs2 31..27=0x18 14..12=0 26..25=0 6..2=0x14 1..0=3 -fmax.s rd rs1 rs2 31..27=0x19 14..12=0 26..25=0 6..2=0x14 1..0=3 - -fmin.d rd rs1 rs2 31..27=0x18 14..12=0 26..25=1 6..2=0x14 1..0=3 -fmax.d rd rs1 rs2 31..27=0x19 14..12=0 26..25=1 6..2=0x14 1..0=3 - +fadd.s rd rs1 rs2 31..27=0x00 rm 26..25=0 6..2=0x14 1..0=3 +fsub.s rd rs1 rs2 31..27=0x01 rm 26..25=0 6..2=0x14 1..0=3 +fmul.s rd rs1 rs2 31..27=0x02 rm 26..25=0 6..2=0x14 1..0=3 +fdiv.s rd rs1 rs2 31..27=0x03 rm 26..25=0 6..2=0x14 1..0=3 +fsgnj.s rd rs1 rs2 31..27=0x04 14..12=0 26..25=0 6..2=0x14 1..0=3 +fsgnjn.s rd rs1 rs2 31..27=0x04 14..12=1 26..25=0 6..2=0x14 1..0=3 +fsgnjx.s rd rs1 rs2 31..27=0x04 14..12=2 26..25=0 6..2=0x14 1..0=3 +fmin.s rd rs1 rs2 31..27=0x05 14..12=0 26..25=0 6..2=0x14 1..0=3 +fmax.s rd rs1 rs2 31..27=0x05 14..12=1 26..25=0 6..2=0x14 1..0=3 +fsqrt.s rd rs1 24..20=0 31..27=0x0B rm 26..25=0 6..2=0x14 1..0=3 + +fadd.d rd rs1 rs2 31..27=0x00 rm 26..25=1 6..2=0x14 1..0=3 +fsub.d rd rs1 rs2 31..27=0x01 rm 26..25=1 6..2=0x14 1..0=3 +fmul.d rd rs1 rs2 31..27=0x02 rm 26..25=1 6..2=0x14 1..0=3 +fdiv.d rd rs1 rs2 31..27=0x03 rm 26..25=1 6..2=0x14 1..0=3 +fsgnj.d rd rs1 rs2 31..27=0x04 14..12=0 26..25=1 6..2=0x14 1..0=3 +fsgnjn.d rd rs1 rs2 31..27=0x04 14..12=1 26..25=1 6..2=0x14 1..0=3 +fsgnjx.d rd rs1 rs2 31..27=0x04 14..12=2 26..25=1 6..2=0x14 1..0=3 +fmin.d rd rs1 rs2 31..27=0x05 14..12=0 26..25=1 6..2=0x14 1..0=3 +fmax.d rd rs1 rs2 31..27=0x05 14..12=1 26..25=1 6..2=0x14 1..0=3 +fcvt.s.d rd rs1 24..20=1 31..27=0x08 rm 26..25=0 6..2=0x14 1..0=3 +fcvt.d.s rd rs1 24..20=0 31..27=0x08 rm 26..25=1 6..2=0x14 1..0=3 +fsqrt.d rd rs1 24..20=0 31..27=0x0B rm 26..25=1 6..2=0x14 1..0=3 + +fle.s rd rs1 rs2 31..27=0x14 14..12=0 26..25=0 6..2=0x14 1..0=3 +flt.s rd rs1 rs2 31..27=0x14 14..12=1 26..25=0 6..2=0x14 1..0=3 +feq.s rd rs1 rs2 31..27=0x14 14..12=2 26..25=0 6..2=0x14 1..0=3 + +fle.d rd rs1 rs2 31..27=0x14 14..12=0 26..25=1 6..2=0x14 1..0=3 +flt.d rd rs1 rs2 31..27=0x14 14..12=1 26..25=1 6..2=0x14 1..0=3 +feq.d rd rs1 rs2 31..27=0x14 14..12=2 26..25=1 6..2=0x14 1..0=3 + +fcvt.w.s rd rs1 24..20=0 31..27=0x18 rm 26..25=0 6..2=0x14 1..0=3 +fcvt.wu.s rd rs1 24..20=1 31..27=0x18 rm 26..25=0 6..2=0x14 1..0=3 +fcvt.l.s rd rs1 24..20=2 31..27=0x18 rm 26..25=0 6..2=0x14 1..0=3 +fcvt.lu.s rd rs1 24..20=3 31..27=0x18 rm 26..25=0 6..2=0x14 1..0=3 fmv.x.s rd rs1 24..20=0 31..27=0x1C 14..12=0 26..25=0 6..2=0x14 1..0=3 +fclass.s rd rs1 24..20=0 31..27=0x1C 14..12=1 26..25=0 6..2=0x14 1..0=3 + +fcvt.w.d rd rs1 24..20=0 31..27=0x18 rm 26..25=1 6..2=0x14 1..0=3 +fcvt.wu.d rd rs1 24..20=1 31..27=0x18 rm 26..25=1 6..2=0x14 1..0=3 +fcvt.l.d rd rs1 24..20=2 31..27=0x18 rm 26..25=1 6..2=0x14 1..0=3 +fcvt.lu.d rd rs1 24..20=3 31..27=0x18 rm 26..25=1 6..2=0x14 1..0=3 fmv.x.d rd rs1 24..20=0 31..27=0x1C 14..12=0 26..25=1 6..2=0x14 1..0=3 -fclass.s rd rs1 24..20=0 31..27=0x1D 14..12=0 26..25=0 6..2=0x14 1..0=3 -fclass.d rd rs1 24..20=0 31..27=0x1D 14..12=0 26..25=1 6..2=0x14 1..0=3 +fclass.d rd rs1 24..20=0 31..27=0x1C 14..12=1 26..25=1 6..2=0x14 1..0=3 + +fcvt.s.w rd rs1 24..20=0 31..27=0x1A rm 26..25=0 6..2=0x14 1..0=3 +fcvt.s.wu rd rs1 24..20=1 31..27=0x1A rm 26..25=0 6..2=0x14 1..0=3 +fcvt.s.l rd rs1 24..20=2 31..27=0x1A rm 26..25=0 6..2=0x14 1..0=3 +fcvt.s.lu rd rs1 24..20=3 31..27=0x1A rm 26..25=0 6..2=0x14 1..0=3 fmv.s.x rd rs1 24..20=0 31..27=0x1E 14..12=0 26..25=0 6..2=0x14 1..0=3 + +fcvt.d.w rd rs1 24..20=0 31..27=0x1A rm 26..25=1 6..2=0x14 1..0=3 +fcvt.d.wu rd rs1 24..20=1 31..27=0x1A rm 26..25=1 6..2=0x14 1..0=3 +fcvt.d.l rd rs1 24..20=2 31..27=0x1A rm 26..25=1 6..2=0x14 1..0=3 +fcvt.d.lu rd rs1 24..20=3 31..27=0x1A rm 26..25=1 6..2=0x14 1..0=3 fmv.d.x rd rs1 24..20=0 31..27=0x1E 14..12=0 26..25=1 6..2=0x14 1..0=3 -flw rd rs1 imm12 14..12=2 6..2=0x01 1..0=3 -fld rd rs1 imm12 14..12=3 6..2=0x01 1..0=3 +flw rd rs1 imm12 14..12=2 6..2=0x01 1..0=3 +fld rd rs1 imm12 14..12=3 6..2=0x01 1..0=3 -fsw imm12hi rs1 rs2 imm12lo 14..12=2 6..2=0x09 1..0=3 -fsd imm12hi rs1 rs2 imm12lo 14..12=3 6..2=0x09 1..0=3 +fsw imm12hi rs1 rs2 imm12lo 14..12=2 6..2=0x09 1..0=3 +fsd imm12hi rs1 rs2 imm12lo 14..12=3 6..2=0x09 1..0=3 -fmadd.s rd rs1 rs2 rs3 rm 26..25=0 6..2=0x10 1..0=3 -fmsub.s rd rs1 rs2 rs3 rm 26..25=0 6..2=0x11 1..0=3 -fnmsub.s rd rs1 rs2 rs3 rm 26..25=0 6..2=0x12 1..0=3 -fnmadd.s rd rs1 rs2 rs3 rm 26..25=0 6..2=0x13 1..0=3 +fmadd.s rd rs1 rs2 rs3 rm 26..25=0 6..2=0x10 1..0=3 +fmsub.s rd rs1 rs2 rs3 rm 26..25=0 6..2=0x11 1..0=3 +fnmsub.s rd rs1 rs2 rs3 rm 26..25=0 6..2=0x12 1..0=3 +fnmadd.s rd rs1 rs2 rs3 rm 26..25=0 6..2=0x13 1..0=3 -fmadd.d rd rs1 rs2 rs3 rm 26..25=1 6..2=0x10 1..0=3 -fmsub.d rd rs1 rs2 rs3 rm 26..25=1 6..2=0x11 1..0=3 -fnmsub.d rd rs1 rs2 rs3 rm 26..25=1 6..2=0x12 1..0=3 -fnmadd.d rd rs1 rs2 rs3 rm 26..25=1 6..2=0x13 1..0=3 +fmadd.d rd rs1 rs2 rs3 rm 26..25=1 6..2=0x10 1..0=3 +fmsub.d rd rs1 rs2 rs3 rm 26..25=1 6..2=0x11 1..0=3 +fnmsub.d rd rs1 rs2 rs3 rm 26..25=1 6..2=0x12 1..0=3 +fnmadd.d rd rs1 rs2 rs3 rm 26..25=1 6..2=0x13 1..0=3 diff --git a/opcodes-pseudo b/opcodes-pseudo index a3abbb8..3bd44ee 100644 --- a/opcodes-pseudo +++ b/opcodes-pseudo @@ -1,8 +1,15 @@ +# Instructions that differ slightly between rv32 and rv64 +@slli-rv32 rd rs1 31..25=0 shamtw 14..12=1 6..2=0x04 1..0=3 +@srli-rv32 rd rs1 31..25=0 shamtw 14..12=5 6..2=0x04 1..0=3 +@srai-rv32 rd rs1 31..25=32 shamtw 14..12=5 6..2=0x04 1..0=3 + # SYSTEM pseudo-instructions that map to csr* -@fsflags rd rs1 31..20=0x001 14..12=1 6..2=0x1C 1..0=3 @frflags rd 19..15=0 31..20=0x001 14..12=2 6..2=0x1C 1..0=3 -@fsrm rd rs1 31..20=0x002 14..12=1 6..2=0x1C 1..0=3 +@fsflags rd rs1 31..20=0x001 14..12=1 6..2=0x1C 1..0=3 +@fsflagsi rd zimm 31..20=0x001 14..12=5 6..2=0x1C 1..0=3 @frrm rd 19..15=0 31..20=0x002 14..12=2 6..2=0x1C 1..0=3 +@fsrm rd rs1 31..20=0x002 14..12=1 6..2=0x1C 1..0=3 +@fsrmi rd zimm 31..20=0x002 14..12=5 6..2=0x1C 1..0=3 @fscsr rd rs1 31..20=0x003 14..12=1 6..2=0x1C 1..0=3 @frcsr rd 19..15=0 31..20=0x003 14..12=2 6..2=0x1C 1..0=3 @rdcycle rd 19..15=0 31..20=0xC00 14..12=2 6..2=0x1C 1..0=3 diff --git a/parse-opcodes b/parse-opcodes index 8523a0a..91801c2 100755 --- a/parse-opcodes +++ b/parse-opcodes @@ -25,6 +25,7 @@ arglut['imm12hi'] = (31,25) arglut['bimm12hi'] = (31,25) arglut['imm12lo'] = (11,7) arglut['bimm12lo'] = (11,7) +arglut['zimm'] = (19,15) arglut['shamt'] = (25,20) arglut['shamtw'] = (24,20) arglut['vseglen'] = (31,29) @@ -151,7 +152,7 @@ def str_arg(arg0,name,match,arguments): return binary(yank(match,start,len),len) def str_inst(name,arguments): - ret = name.upper() + ' ' + ret = name.upper().replace('-RV32','') + ' ' if 'imm12hi' in arguments and 'imm12lo' in arguments: arguments.remove('imm12hi') arguments.remove('imm12lo') @@ -169,6 +170,9 @@ def str_inst(name,arguments): if 'jimm20' in arguments: arguments.remove('jimm20') arguments.append('imm') + if 'zimm' in arguments: + arguments.remove('zimm') + arguments.append('imm') if 'shamtw' in arguments: arguments.remove('shamtw') arguments.append('shamt') @@ -344,7 +348,7 @@ def print_r_type(name,match,arguments): ( \ binary(yank(match,25,7),7), \ str_arg('rs2','',match,arguments), \ - str_arg('rs1','',match,arguments), \ + 'zimm' in arguments and str_arg('zimm','imm[4:0]',match,arguments) or str_arg('rs1','',match,arguments), \ str_arg('rm','',match,arguments), \ str_arg('rd','',match,arguments), \ binary(yank(match,opcode_base,opcode_size),opcode_size), \ @@ -567,7 +571,7 @@ def make_latex_table(): print_insts('lui', 'auipc') print_insts('jal', 'jalr', 'beq', 'bne', 'blt', 'bge', 'bltu', 'bgeu') print_insts('lb', 'lh', 'lw', 'lbu', 'lhu', 'sb', 'sh', 'sw') - print_insts('addi', 'slti', 'sltiu', 'xori', 'ori', 'andi', 'slli', 'srli', 'srai') + print_insts('addi', 'slti', 'sltiu', 'xori', 'ori', 'andi', 'slli-rv32', 'srli-rv32', 'srai-rv32') print_insts('add', 'sub', 'sll', 'slt', 'sltu', 'xor', 'srl', 'sra', 'or', 'and') print_insts('fence', 'fence.i') print_insts('scall', 'sbreak', 'rdcycle', 'rdtime', 'rdinstret') @@ -576,6 +580,7 @@ def make_latex_table(): print_header('r','a','i','s') print_subtitle('RV64I Base Instruction Set (in addition to RV32I)') print_insts('lwu', 'ld', 'sd') + print_insts('slli', 'srli', 'srai') print_insts('addiw', 'slliw', 'srliw', 'sraiw') print_insts('addw', 'subw', 'sllw', 'srlw', 'sraw') print_subtitle('RV32M Standard Extension') @@ -598,32 +603,32 @@ def make_latex_table(): print_insts('amomin.d', 'amomax.d', 'amominu.d', 'amomaxu.d') print_subtitle('RV32F Standard Extension') print_insts('flw', 'fsw') - print_insts('fadd.s', 'fsub.s', 'fmul.s', 'fdiv.s', 'fsqrt.s', 'fmin.s', 'fmax.s') print_insts('fmadd.s', 'fmsub.s', 'fnmsub.s', 'fnmadd.s') - print_insts('fsgnj.s', 'fsgnjn.s', 'fsgnjx.s') - print_insts('fcvt.s.w', 'fcvt.s.wu', 'fmv.s.x') + print_insts('fadd.s', 'fsub.s', 'fmul.s', 'fdiv.s', 'fsqrt.s') + print_insts('fsgnj.s', 'fsgnjn.s', 'fsgnjx.s', 'fmin.s', 'fmax.s') print_insts('fcvt.w.s', 'fcvt.wu.s', 'fmv.x.s') - print_insts('fclass.s', 'feq.s', 'flt.s', 'fle.s') + print_insts('feq.s', 'flt.s', 'fle.s', 'fclass.s') + print_insts('fcvt.s.w', 'fcvt.s.wu', 'fmv.s.x') print_insts('frcsr', 'frrm', 'frflags') - print_insts('fscsr', 'fsrm', 'fsflags') + print_insts('fscsr', 'fsrm', 'fsflags', 'fsrmi', 'fsflagsi') print_footer(0) print_header('r','r4','i','s') print_subtitle('RV64F Standard Extension (in addition to RV32F)') - print_insts('fcvt.s.l', 'fcvt.s.lu') print_insts('fcvt.l.s', 'fcvt.lu.s') + print_insts('fcvt.s.l', 'fcvt.s.lu') print_subtitle('RV32D Standard Extension') print_insts('fld', 'fsd') - print_insts('fadd.d', 'fsub.d', 'fmul.d', 'fdiv.d', 'fsqrt.d', 'fmin.d', 'fmax.d') print_insts('fmadd.d', 'fmsub.d', 'fnmsub.d', 'fnmadd.d') - print_insts('fsgnj.d', 'fsgnjn.d', 'fsgnjx.d') - print_insts('fcvt.d.w', 'fcvt.d.wu') + print_insts('fadd.d', 'fsub.d', 'fmul.d', 'fdiv.d', 'fsqrt.d') + print_insts('fsgnj.d', 'fsgnjn.d', 'fsgnjx.d', 'fmin.d', 'fmax.d') + print_insts('fcvt.s.d', 'fcvt.d.s') + print_insts('feq.d', 'flt.d', 'fle.d', 'fclass.d') print_insts('fcvt.w.d', 'fcvt.wu.d') - print_insts('fclass.d', 'feq.d', 'flt.d', 'fle.d') + print_insts('fcvt.d.w', 'fcvt.d.wu') print_subtitle('RV64D Standard Extension (in addition to RV32D)') - print_insts('fcvt.d.l', 'fcvt.d.lu', 'fmv.d.x') print_insts('fcvt.l.d', 'fcvt.lu.d', 'fmv.x.d') - print_insts('fcvt.s.d', 'fcvt.d.s') + print_insts('fcvt.d.l', 'fcvt.d.lu', 'fmv.d.x') print_footer(1) def print_chisel_insn(name): -- cgit v1.2.3