From 63856833c03c90e4ab540fcf323521a85756ae49 Mon Sep 17 00:00:00 2001 From: Quan Nguyen Date: Thu, 17 Oct 2013 23:49:34 -0700 Subject: Add half-precision floating-point instructions * Add opcodes-hwacha-pseudo to be produced as well, or else GCC will complain. --- Makefile | 5 +++-- opcodes | 41 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 44 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 6034644..3e332ab 100644 --- a/Makefile +++ b/Makefile @@ -11,9 +11,10 @@ $(ISASIM_H): opcodes parse-opcodes $(PK_H): opcodes parse-opcodes ./parse-opcodes -disasm < $< > $@ -$(GAS_H): opcodes opcodes-hwacha opcodes-rvc opcodes-custom parse-opcodes +$(GAS_H): opcodes opcodes-hwacha opcodes-rvc opcodes-custom opcodes-hwacha-pseudo parse-opcodes ./parse-opcodes -disasm < $< > $@ - #./parse-opcodes -disasm < opcodes-hwacha >> $@ + ./parse-opcodes -disasm < opcodes-hwacha >> $@ + ./parse-opcodes -disasm < opcodes-hwacha-pseudo >> $@ ./parse-opcodes -disasm < opcodes-rvc >> $@ ./parse-opcodes -disasm < opcodes-custom >> $@ diff --git a/opcodes b/opcodes index 44490c5..fea71e1 100644 --- a/opcodes +++ b/opcodes @@ -141,6 +141,15 @@ fsgnj.d rd rs1 rs2 31..27=0x5 14..12=0 26..25=1 6..2=0x14 1..0=3 fsgnjn.d rd rs1 rs2 31..27=0x6 14..12=0 26..25=1 6..2=0x14 1..0=3 fsgnjx.d rd rs1 rs2 31..27=0x7 14..12=0 26..25=1 6..2=0x14 1..0=3 +fadd.h rd rs1 rs2 31..27=0x0 rm 26..25=2 6..2=0x14 1..0=3 +fsub.h rd rs1 rs2 31..27=0x1 rm 26..25=2 6..2=0x14 1..0=3 +fmul.h rd rs1 rs2 31..27=0x2 rm 26..25=2 6..2=0x14 1..0=3 +fdiv.h rd rs1 rs2 31..27=0x3 rm 26..25=2 6..2=0x14 1..0=3 +fsqrt.h rd rs1 24..20=0 31..27=0x4 rm 26..25=2 6..2=0x14 1..0=3 +fsgnj.h rd rs1 rs2 31..27=0x5 14..12=0 26..25=2 6..2=0x14 1..0=3 +fsgnjn.h rd rs1 rs2 31..27=0x6 14..12=0 26..25=2 6..2=0x14 1..0=3 +fsgnjx.h rd rs1 rs2 31..27=0x7 14..12=0 26..25=2 6..2=0x14 1..0=3 + fcvt.l.s rd rs1 24..20=0 31..27=0x8 rm 26..25=0 6..2=0x14 1..0=3 fcvt.lu.s rd rs1 24..20=0 31..27=0x9 rm 26..25=0 6..2=0x14 1..0=3 fcvt.w.s rd rs1 24..20=0 31..27=0xA rm 26..25=0 6..2=0x14 1..0=3 @@ -151,6 +160,11 @@ fcvt.lu.d rd rs1 24..20=0 31..27=0x9 rm 26..25=1 6..2=0x14 1..0=3 fcvt.w.d rd rs1 24..20=0 31..27=0xA rm 26..25=1 6..2=0x14 1..0=3 fcvt.wu.d rd rs1 24..20=0 31..27=0xB rm 26..25=1 6..2=0x14 1..0=3 +fcvt.l.h rd rs1 24..20=0 31..27=0x8 rm 26..25=2 6..2=0x14 1..0=3 +fcvt.lu.h rd rs1 24..20=0 31..27=0x9 rm 26..25=2 6..2=0x14 1..0=3 +fcvt.w.h rd rs1 24..20=0 31..27=0xA rm 26..25=2 6..2=0x14 1..0=3 +fcvt.wu.h rd rs1 24..20=0 31..27=0xB rm 26..25=2 6..2=0x14 1..0=3 + fcvt.s.l rd rs1 24..20=0 31..27=0xC rm 26..25=0 6..2=0x14 1..0=3 fcvt.s.lu rd rs1 24..20=0 31..27=0xD rm 26..25=0 6..2=0x14 1..0=3 fcvt.s.w rd rs1 24..20=0 31..27=0xE rm 26..25=0 6..2=0x14 1..0=3 @@ -161,9 +175,20 @@ fcvt.d.lu rd rs1 24..20=0 31..27=0xD rm 26..25=1 6..2=0x14 1..0=3 fcvt.d.w rd rs1 24..20=0 31..27=0xE rm 26..25=1 6..2=0x14 1..0=3 fcvt.d.wu rd rs1 24..20=0 31..27=0xF rm 26..25=1 6..2=0x14 1..0=3 +fcvt.h.l rd rs1 24..20=0 31..27=0xC rm 26..25=2 6..2=0x14 1..0=3 +fcvt.h.lu rd rs1 24..20=0 31..27=0xD rm 26..25=2 6..2=0x14 1..0=3 +fcvt.h.w rd rs1 24..20=0 31..27=0xE rm 26..25=2 6..2=0x14 1..0=3 +fcvt.h.wu rd rs1 24..20=0 31..27=0xF rm 26..25=2 6..2=0x14 1..0=3 + fcvt.s.d rd rs1 24..20=0 31..29=0x4 28..27=1 rm 26..25=0 6..2=0x14 1..0=3 fcvt.d.s rd rs1 24..20=0 31..29=0x4 28..27=0 rm 26..25=1 6..2=0x14 1..0=3 +fcvt.s.h rd rs1 24..20=0 31..29=0x4 28..27=0 rm 26..25=2 6..2=0x14 1..0=3 +fcvt.h.s rd rs1 24..20=0 31..29=0x4 28..27=2 rm 26..25=0 6..2=0x14 1..0=3 + +fcvt.d.h rd rs1 24..20=0 31..29=0x4 28..27=1 rm 26..25=2 6..2=0x14 1..0=3 +fcvt.h.d rd rs1 24..20=0 31..29=0x4 28..27=2 rm 26..25=1 6..2=0x14 1..0=3 + feq.s rd rs1 rs2 31..27=0x15 14..12=0 26..25=0 6..2=0x14 1..0=3 flt.s rd rs1 rs2 31..27=0x16 14..12=0 26..25=0 6..2=0x14 1..0=3 fle.s rd rs1 rs2 31..27=0x17 14..12=0 26..25=0 6..2=0x14 1..0=3 @@ -172,22 +197,33 @@ feq.d rd rs1 rs2 31..27=0x15 14..12=0 26..25=1 6..2=0x14 1..0=3 flt.d rd rs1 rs2 31..27=0x16 14..12=0 26..25=1 6..2=0x14 1..0=3 fle.d rd rs1 rs2 31..27=0x17 14..12=0 26..25=1 6..2=0x14 1..0=3 +feq.h rd rs1 rs2 31..27=0x15 14..12=0 26..25=2 6..2=0x14 1..0=3 +flt.h rd rs1 rs2 31..27=0x16 14..12=0 26..25=2 6..2=0x14 1..0=3 +fle.h rd rs1 rs2 31..27=0x17 14..12=0 26..25=2 6..2=0x14 1..0=3 + fmin.s rd rs1 rs2 31..27=0x18 14..12=0 26..25=0 6..2=0x14 1..0=3 fmax.s rd rs1 rs2 31..27=0x19 14..12=0 26..25=0 6..2=0x14 1..0=3 fmin.d rd rs1 rs2 31..27=0x18 14..12=0 26..25=1 6..2=0x14 1..0=3 fmax.d rd rs1 rs2 31..27=0x19 14..12=0 26..25=1 6..2=0x14 1..0=3 +fmin.h rd rs1 rs2 31..27=0x18 14..12=0 26..25=2 6..2=0x14 1..0=3 +fmax.h rd rs1 rs2 31..27=0x19 14..12=0 26..25=2 6..2=0x14 1..0=3 + fmv.x.s rd rs1 24..20=0 31..27=0x1C 14..12=0 26..25=0 6..2=0x14 1..0=3 fmv.x.d rd rs1 24..20=0 31..27=0x1C 14..12=0 26..25=1 6..2=0x14 1..0=3 +fmv.x.h rd rs1 24..20=0 31..27=0x1C 14..12=0 26..25=2 6..2=0x14 1..0=3 frsr rd 19..15=0 24..20=0 31..27=0x1D 14..12=0 26..25=0 6..2=0x14 1..0=3 fmv.s.x rd rs1 24..20=0 31..27=0x1E 14..12=0 26..25=0 6..2=0x14 1..0=3 fmv.d.x rd rs1 24..20=0 31..27=0x1E 14..12=0 26..25=1 6..2=0x14 1..0=3 +fmv.h.x rd rs1 24..20=0 31..27=0x1E 14..12=0 26..25=2 6..2=0x14 1..0=3 fssr rd rs1 24..20=0 31..27=0x1F 14..12=0 26..25=0 6..2=0x14 1..0=3 +flh rd rs1 imm12 14..12=1 6..2=0x01 1..0=3 flw rd rs1 imm12 14..12=2 6..2=0x01 1..0=3 fld rd rs1 imm12 14..12=3 6..2=0x01 1..0=3 +fsh imm12hi rs1 rs2 imm12lo 14..12=1 6..2=0x09 1..0=3 fsw imm12hi rs1 rs2 imm12lo 14..12=2 6..2=0x09 1..0=3 fsd imm12hi rs1 rs2 imm12lo 14..12=3 6..2=0x09 1..0=3 @@ -200,3 +236,8 @@ fmadd.d rd rs1 rs2 rs3 rm 26..25=1 6..2=0x10 1..0=3 fmsub.d rd rs1 rs2 rs3 rm 26..25=1 6..2=0x11 1..0=3 fnmsub.d rd rs1 rs2 rs3 rm 26..25=1 6..2=0x12 1..0=3 fnmadd.d rd rs1 rs2 rs3 rm 26..25=1 6..2=0x13 1..0=3 + +fmadd.h rd rs1 rs2 rs3 rm 26..25=2 6..2=0x10 1..0=3 +fmsub.h rd rs1 rs2 rs3 rm 26..25=2 6..2=0x11 1..0=3 +fnmsub.h rd rs1 rs2 rs3 rm 26..25=2 6..2=0x12 1..0=3 +fnmadd.h rd rs1 rs2 rs3 rm 26..25=2 6..2=0x13 1..0=3 -- cgit v1.2.3 From f8e8b19f0bed6d03910e507760eabb10e3727693 Mon Sep 17 00:00:00 2001 From: Quan Nguyen Date: Sun, 27 Oct 2013 21:56:24 -0700 Subject: Move half-precision opcodes to opcodes-hwacha-ut --- Makefile | 3 ++- opcodes | 40 ---------------------------------------- opcodes-hwacha-ut | 55 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 57 insertions(+), 41 deletions(-) create mode 100644 opcodes-hwacha-ut diff --git a/Makefile b/Makefile index 3e332ab..28ec0de 100644 --- a/Makefile +++ b/Makefile @@ -11,10 +11,11 @@ $(ISASIM_H): opcodes parse-opcodes $(PK_H): opcodes parse-opcodes ./parse-opcodes -disasm < $< > $@ -$(GAS_H): opcodes opcodes-hwacha opcodes-rvc opcodes-custom opcodes-hwacha-pseudo parse-opcodes +$(GAS_H): opcodes opcodes-hwacha opcodes-hwacha-ut opcodes-rvc opcodes-custom opcodes-hwacha-pseudo parse-opcodes ./parse-opcodes -disasm < $< > $@ ./parse-opcodes -disasm < opcodes-hwacha >> $@ ./parse-opcodes -disasm < opcodes-hwacha-pseudo >> $@ + ./parse-opcodes -disasm < opcodes-hwacha-ut >> $@ ./parse-opcodes -disasm < opcodes-rvc >> $@ ./parse-opcodes -disasm < opcodes-custom >> $@ diff --git a/opcodes b/opcodes index fea71e1..e0f087b 100644 --- a/opcodes +++ b/opcodes @@ -141,15 +141,6 @@ fsgnj.d rd rs1 rs2 31..27=0x5 14..12=0 26..25=1 6..2=0x14 1..0=3 fsgnjn.d rd rs1 rs2 31..27=0x6 14..12=0 26..25=1 6..2=0x14 1..0=3 fsgnjx.d rd rs1 rs2 31..27=0x7 14..12=0 26..25=1 6..2=0x14 1..0=3 -fadd.h rd rs1 rs2 31..27=0x0 rm 26..25=2 6..2=0x14 1..0=3 -fsub.h rd rs1 rs2 31..27=0x1 rm 26..25=2 6..2=0x14 1..0=3 -fmul.h rd rs1 rs2 31..27=0x2 rm 26..25=2 6..2=0x14 1..0=3 -fdiv.h rd rs1 rs2 31..27=0x3 rm 26..25=2 6..2=0x14 1..0=3 -fsqrt.h rd rs1 24..20=0 31..27=0x4 rm 26..25=2 6..2=0x14 1..0=3 -fsgnj.h rd rs1 rs2 31..27=0x5 14..12=0 26..25=2 6..2=0x14 1..0=3 -fsgnjn.h rd rs1 rs2 31..27=0x6 14..12=0 26..25=2 6..2=0x14 1..0=3 -fsgnjx.h rd rs1 rs2 31..27=0x7 14..12=0 26..25=2 6..2=0x14 1..0=3 - fcvt.l.s rd rs1 24..20=0 31..27=0x8 rm 26..25=0 6..2=0x14 1..0=3 fcvt.lu.s rd rs1 24..20=0 31..27=0x9 rm 26..25=0 6..2=0x14 1..0=3 fcvt.w.s rd rs1 24..20=0 31..27=0xA rm 26..25=0 6..2=0x14 1..0=3 @@ -160,11 +151,6 @@ fcvt.lu.d rd rs1 24..20=0 31..27=0x9 rm 26..25=1 6..2=0x14 1..0=3 fcvt.w.d rd rs1 24..20=0 31..27=0xA rm 26..25=1 6..2=0x14 1..0=3 fcvt.wu.d rd rs1 24..20=0 31..27=0xB rm 26..25=1 6..2=0x14 1..0=3 -fcvt.l.h rd rs1 24..20=0 31..27=0x8 rm 26..25=2 6..2=0x14 1..0=3 -fcvt.lu.h rd rs1 24..20=0 31..27=0x9 rm 26..25=2 6..2=0x14 1..0=3 -fcvt.w.h rd rs1 24..20=0 31..27=0xA rm 26..25=2 6..2=0x14 1..0=3 -fcvt.wu.h rd rs1 24..20=0 31..27=0xB rm 26..25=2 6..2=0x14 1..0=3 - fcvt.s.l rd rs1 24..20=0 31..27=0xC rm 26..25=0 6..2=0x14 1..0=3 fcvt.s.lu rd rs1 24..20=0 31..27=0xD rm 26..25=0 6..2=0x14 1..0=3 fcvt.s.w rd rs1 24..20=0 31..27=0xE rm 26..25=0 6..2=0x14 1..0=3 @@ -175,20 +161,9 @@ fcvt.d.lu rd rs1 24..20=0 31..27=0xD rm 26..25=1 6..2=0x14 1..0=3 fcvt.d.w rd rs1 24..20=0 31..27=0xE rm 26..25=1 6..2=0x14 1..0=3 fcvt.d.wu rd rs1 24..20=0 31..27=0xF rm 26..25=1 6..2=0x14 1..0=3 -fcvt.h.l rd rs1 24..20=0 31..27=0xC rm 26..25=2 6..2=0x14 1..0=3 -fcvt.h.lu rd rs1 24..20=0 31..27=0xD rm 26..25=2 6..2=0x14 1..0=3 -fcvt.h.w rd rs1 24..20=0 31..27=0xE rm 26..25=2 6..2=0x14 1..0=3 -fcvt.h.wu rd rs1 24..20=0 31..27=0xF rm 26..25=2 6..2=0x14 1..0=3 - fcvt.s.d rd rs1 24..20=0 31..29=0x4 28..27=1 rm 26..25=0 6..2=0x14 1..0=3 fcvt.d.s rd rs1 24..20=0 31..29=0x4 28..27=0 rm 26..25=1 6..2=0x14 1..0=3 -fcvt.s.h rd rs1 24..20=0 31..29=0x4 28..27=0 rm 26..25=2 6..2=0x14 1..0=3 -fcvt.h.s rd rs1 24..20=0 31..29=0x4 28..27=2 rm 26..25=0 6..2=0x14 1..0=3 - -fcvt.d.h rd rs1 24..20=0 31..29=0x4 28..27=1 rm 26..25=2 6..2=0x14 1..0=3 -fcvt.h.d rd rs1 24..20=0 31..29=0x4 28..27=2 rm 26..25=1 6..2=0x14 1..0=3 - feq.s rd rs1 rs2 31..27=0x15 14..12=0 26..25=0 6..2=0x14 1..0=3 flt.s rd rs1 rs2 31..27=0x16 14..12=0 26..25=0 6..2=0x14 1..0=3 fle.s rd rs1 rs2 31..27=0x17 14..12=0 26..25=0 6..2=0x14 1..0=3 @@ -197,33 +172,22 @@ feq.d rd rs1 rs2 31..27=0x15 14..12=0 26..25=1 6..2=0x14 1..0=3 flt.d rd rs1 rs2 31..27=0x16 14..12=0 26..25=1 6..2=0x14 1..0=3 fle.d rd rs1 rs2 31..27=0x17 14..12=0 26..25=1 6..2=0x14 1..0=3 -feq.h rd rs1 rs2 31..27=0x15 14..12=0 26..25=2 6..2=0x14 1..0=3 -flt.h rd rs1 rs2 31..27=0x16 14..12=0 26..25=2 6..2=0x14 1..0=3 -fle.h rd rs1 rs2 31..27=0x17 14..12=0 26..25=2 6..2=0x14 1..0=3 - fmin.s rd rs1 rs2 31..27=0x18 14..12=0 26..25=0 6..2=0x14 1..0=3 fmax.s rd rs1 rs2 31..27=0x19 14..12=0 26..25=0 6..2=0x14 1..0=3 fmin.d rd rs1 rs2 31..27=0x18 14..12=0 26..25=1 6..2=0x14 1..0=3 fmax.d rd rs1 rs2 31..27=0x19 14..12=0 26..25=1 6..2=0x14 1..0=3 -fmin.h rd rs1 rs2 31..27=0x18 14..12=0 26..25=2 6..2=0x14 1..0=3 -fmax.h rd rs1 rs2 31..27=0x19 14..12=0 26..25=2 6..2=0x14 1..0=3 - fmv.x.s rd rs1 24..20=0 31..27=0x1C 14..12=0 26..25=0 6..2=0x14 1..0=3 fmv.x.d rd rs1 24..20=0 31..27=0x1C 14..12=0 26..25=1 6..2=0x14 1..0=3 -fmv.x.h rd rs1 24..20=0 31..27=0x1C 14..12=0 26..25=2 6..2=0x14 1..0=3 frsr rd 19..15=0 24..20=0 31..27=0x1D 14..12=0 26..25=0 6..2=0x14 1..0=3 fmv.s.x rd rs1 24..20=0 31..27=0x1E 14..12=0 26..25=0 6..2=0x14 1..0=3 fmv.d.x rd rs1 24..20=0 31..27=0x1E 14..12=0 26..25=1 6..2=0x14 1..0=3 -fmv.h.x rd rs1 24..20=0 31..27=0x1E 14..12=0 26..25=2 6..2=0x14 1..0=3 fssr rd rs1 24..20=0 31..27=0x1F 14..12=0 26..25=0 6..2=0x14 1..0=3 -flh rd rs1 imm12 14..12=1 6..2=0x01 1..0=3 flw rd rs1 imm12 14..12=2 6..2=0x01 1..0=3 fld rd rs1 imm12 14..12=3 6..2=0x01 1..0=3 -fsh imm12hi rs1 rs2 imm12lo 14..12=1 6..2=0x09 1..0=3 fsw imm12hi rs1 rs2 imm12lo 14..12=2 6..2=0x09 1..0=3 fsd imm12hi rs1 rs2 imm12lo 14..12=3 6..2=0x09 1..0=3 @@ -237,7 +201,3 @@ fmsub.d rd rs1 rs2 rs3 rm 26..25=1 6..2=0x11 1..0=3 fnmsub.d rd rs1 rs2 rs3 rm 26..25=1 6..2=0x12 1..0=3 fnmadd.d rd rs1 rs2 rs3 rm 26..25=1 6..2=0x13 1..0=3 -fmadd.h rd rs1 rs2 rs3 rm 26..25=2 6..2=0x10 1..0=3 -fmsub.h rd rs1 rs2 rs3 rm 26..25=2 6..2=0x11 1..0=3 -fnmsub.h rd rs1 rs2 rs3 rm 26..25=2 6..2=0x12 1..0=3 -fnmadd.h rd rs1 rs2 rs3 rm 26..25=2 6..2=0x13 1..0=3 diff --git a/opcodes-hwacha-ut b/opcodes-hwacha-ut new file mode 100644 index 0000000..ad88fed --- /dev/null +++ b/opcodes-hwacha-ut @@ -0,0 +1,55 @@ +# format of a line in this file: +# +# +# is given by specifying one or more range/value pairs: +# hi..lo=value or bit=value or arg=value (e.g. 6..2=0x45 10=1 rd=0) +# +# is one of rd, rs1, rs2, rs3, imm25, imm20, imm12, imm12lo, imm12hi, +# shamtw, shamt, rm + +# half-precision floating-point operations for hwacha microthreads + +fadd.h rd rs1 rs2 31..27=0x0 rm 26..25=2 6..2=0x14 1..0=3 +fsub.h rd rs1 rs2 31..27=0x1 rm 26..25=2 6..2=0x14 1..0=3 +fmul.h rd rs1 rs2 31..27=0x2 rm 26..25=2 6..2=0x14 1..0=3 +fdiv.h rd rs1 rs2 31..27=0x3 rm 26..25=2 6..2=0x14 1..0=3 +fsqrt.h rd rs1 24..20=0 31..27=0x4 rm 26..25=2 6..2=0x14 1..0=3 +fsgnj.h rd rs1 rs2 31..27=0x5 14..12=0 26..25=2 6..2=0x14 1..0=3 +fsgnjn.h rd rs1 rs2 31..27=0x6 14..12=0 26..25=2 6..2=0x14 1..0=3 +fsgnjx.h rd rs1 rs2 31..27=0x7 14..12=0 26..25=2 6..2=0x14 1..0=3 + +fcvt.h.l rd rs1 24..20=0 31..27=0xC rm 26..25=2 6..2=0x14 1..0=3 +fcvt.h.lu rd rs1 24..20=0 31..27=0xD rm 26..25=2 6..2=0x14 1..0=3 +fcvt.h.w rd rs1 24..20=0 31..27=0xE rm 26..25=2 6..2=0x14 1..0=3 +fcvt.h.wu rd rs1 24..20=0 31..27=0xF rm 26..25=2 6..2=0x14 1..0=3 + +fcvt.l.h rd rs1 24..20=0 31..27=0x8 rm 26..25=2 6..2=0x14 1..0=3 +fcvt.lu.h rd rs1 24..20=0 31..27=0x9 rm 26..25=2 6..2=0x14 1..0=3 +fcvt.w.h rd rs1 24..20=0 31..27=0xA rm 26..25=2 6..2=0x14 1..0=3 +fcvt.wu.h rd rs1 24..20=0 31..27=0xB rm 26..25=2 6..2=0x14 1..0=3 + +fcvt.s.h rd rs1 24..20=0 31..29=0x4 28..27=0 rm 26..25=2 6..2=0x14 1..0=3 +fcvt.h.s rd rs1 24..20=0 31..29=0x4 28..27=2 rm 26..25=0 6..2=0x14 1..0=3 + +fcvt.d.h rd rs1 24..20=0 31..29=0x4 28..27=1 rm 26..25=2 6..2=0x14 1..0=3 +fcvt.h.d rd rs1 24..20=0 31..29=0x4 28..27=2 rm 26..25=1 6..2=0x14 1..0=3 + +feq.h rd rs1 rs2 31..27=0x15 14..12=0 26..25=2 6..2=0x14 1..0=3 +flt.h rd rs1 rs2 31..27=0x16 14..12=0 26..25=2 6..2=0x14 1..0=3 +fle.h rd rs1 rs2 31..27=0x17 14..12=0 26..25=2 6..2=0x14 1..0=3 + +fmin.h rd rs1 rs2 31..27=0x18 14..12=0 26..25=2 6..2=0x14 1..0=3 +fmax.h rd rs1 rs2 31..27=0x19 14..12=0 26..25=2 6..2=0x14 1..0=3 + +fmv.x.h rd rs1 24..20=0 31..27=0x1C 14..12=0 26..25=2 6..2=0x14 1..0=3 +fmv.h.x rd rs1 24..20=0 31..27=0x1E 14..12=0 26..25=2 6..2=0x14 1..0=3 + +flh rd rs1 imm12 14..12=1 6..2=0x01 1..0=3 + +fsh imm12hi rs1 rs2 imm12lo 14..12=1 6..2=0x09 1..0=3 + +fmadd.h rd rs1 rs2 rs3 rm 26..25=2 6..2=0x10 1..0=3 +fmsub.h rd rs1 rs2 rs3 rm 26..25=2 6..2=0x11 1..0=3 +fnmsub.h rd rs1 rs2 rs3 rm 26..25=2 6..2=0x12 1..0=3 +fnmadd.h rd rs1 rs2 rs3 rm 26..25=2 6..2=0x13 1..0=3 + -- cgit v1.2.3 From 128c2b7ef1790b39dc43b5aa2b0876becff01440 Mon Sep 17 00:00:00 2001 From: Quan Nguyen Date: Sun, 24 Nov 2013 22:02:14 -0800 Subject: Add line in Makefile to parse confprec --- Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile index 28ec0de..3092932 100644 --- a/Makefile +++ b/Makefile @@ -7,6 +7,7 @@ install: $(ISASIM_H) $(PK_H) $(GAS_H) $(XCC_H) inst.chisel instr-table.tex $(ISASIM_H): opcodes parse-opcodes ./parse-opcodes -isasim < $< > $@ + ./parse-opcodes -isasim < opcodes-hwacha-ut > ../riscv-isa-sim/hwacha/opcodes_hwacha_ut_half.h $(PK_H): opcodes parse-opcodes ./parse-opcodes -disasm < $< > $@ -- cgit v1.2.3 From 612076a5c7b8e3e5625e5a0d803d6faa2f402737 Mon Sep 17 00:00:00 2001 From: Quan Nguyen Date: Fri, 29 Nov 2013 20:24:44 -0800 Subject: Add vsetprec instruction --- opcodes-hwacha | 1 + 1 file changed, 1 insertion(+) diff --git a/opcodes-hwacha b/opcodes-hwacha index c5ec547..d919786 100644 --- a/opcodes-hwacha +++ b/opcodes-hwacha @@ -11,6 +11,7 @@ fmovn 31..25=3 rs2 rs1 14..12=7 rd 6..2=0x1D 1..0=3 # vector instructions vsetcfg imm12 rs1 14=0 13=1 12=0 11..7=0 6..2=0x02 1..0=3 vsetvl 31..25=0 24..20=0 rs1 14=1 13=1 12=0 rd 6..2=0x02 1..0=3 +vsetprec imm12 19..15=1 14=0 13=0 12=0 11..7=0 6..2=0x16 1..0=3 vgetcfg 31..25=0 24..20=0 19..15=0 14=1 13=0 12=0 rd 6..2=0x02 1..0=3 vgetvl 31..25=1 24..20=0 19..15=0 14=1 13=0 12=0 rd 6..2=0x02 1..0=3 -- cgit v1.2.3