From 461bbedb2105312f055178346a588194fad9acec Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Tue, 1 Feb 2011 23:22:54 -0800 Subject: [xcc,opcodes,pk,sim] cleanup to FP ISA - Added 5th rounding mode - Removed MFCR/MTCR in favor of MFFSR/MTFSR (it was the only CR...) - merged MTF.D with MTFLH.D; operation depends on RV32/RV64 mode - made MFFL.D and MFFH.D illegal in RV64 --- inst.v | 47 +++++++++++++++++++++++------------------------ instr-table.tex | 48 +++++++++++++++--------------------------------- opcodes | 53 ++++++++++++++++++++++++++--------------------------- 3 files changed, 64 insertions(+), 84 deletions(-) diff --git a/inst.v b/inst.v index d403ab0..afb95cd 100644 --- a/inst.v +++ b/inst.v @@ -81,8 +81,6 @@ `define AMOMINU_D 32'b?????_?????_?????_00001_100_11_1000011 `define AMOMAXU_D 32'b?????_?????_?????_00001_110_11_1000011 `define RDNPC 32'b?????_00000_00000_0000000000_0010111 -`define MFCR 32'b?????_00000_?????_0000000001_0010111 -`define MTCR 32'b00000_?????_?????_0000001001_0010111 `define SYNC 32'b00000_00000_00000_0000000010_0010111 `define SYSCALL 32'b00000_00000_????????????_011_0010111 `define EI 32'b?????_00000_00000_0000000000_1111111 @@ -95,17 +93,17 @@ `define FMUL_S 32'b?????_?????_?????_00010_???_00_1010011 `define FDIV_S 32'b?????_?????_?????_00011_???_00_1010011 `define FSQRT_S 32'b?????_?????_00000_00100_???_00_1010011 -`define FSINJ_S 32'b?????_?????_?????_0010100000_1010011 -`define FSINJN_S 32'b?????_?????_?????_0011000000_1010011 -`define FSMUL_S 32'b?????_?????_?????_0011100000_1010011 +`define FSINJ_S 32'b?????_?????_?????_0010111100_1010011 +`define FSINJN_S 32'b?????_?????_?????_0011011100_1010011 +`define FSMUL_S 32'b?????_?????_?????_0011111100_1010011 `define FADD_D 32'b?????_?????_?????_00000_???_01_1010011 `define FSUB_D 32'b?????_?????_?????_00001_???_01_1010011 `define FMUL_D 32'b?????_?????_?????_00010_???_01_1010011 `define FDIV_D 32'b?????_?????_?????_00011_???_01_1010011 `define FSQRT_D 32'b?????_?????_00000_00100_???_01_1010011 -`define FSINJ_D 32'b?????_?????_?????_0010100001_1010011 -`define FSINJN_D 32'b?????_?????_?????_0011000001_1010011 -`define FSMUL_D 32'b?????_?????_?????_0011100001_1010011 +`define FSINJ_D 32'b?????_?????_?????_0010111101_1010011 +`define FSINJN_D 32'b?????_?????_?????_0011011101_1010011 +`define FSMUL_D 32'b?????_?????_?????_0011111101_1010011 `define FCVT_L_S 32'b?????_?????_00000_01000_???_00_1010011 `define FCVTU_L_S 32'b?????_?????_00000_01001_???_00_1010011 `define FCVT_W_S 32'b?????_?????_00000_01010_???_00_1010011 @@ -120,23 +118,24 @@ `define FCVTU_S_W 32'b?????_?????_00000_01111_???_00_1010011 `define FCVT_D_L 32'b?????_?????_00000_01100_???_01_1010011 `define FCVTU_D_L 32'b?????_?????_00000_01101_???_01_1010011 -`define FCVT_D_W 32'b?????_?????_00000_0111000001_1010011 -`define FCVTU_D_W 32'b?????_?????_00000_0111100001_1010011 +`define FCVT_D_W 32'b?????_?????_00000_0111011101_1010011 +`define FCVTU_D_W 32'b?????_?????_00000_0111111101_1010011 `define FCVT_S_D 32'b?????_?????_00000_10001_???_00_1010011 -`define FCVT_D_S 32'b?????_?????_00000_1000000001_1010011 -`define FC_EQ_S 32'b?????_?????_?????_1010100000_1010011 -`define FC_LT_S 32'b?????_?????_?????_1011000000_1010011 -`define FC_LE_S 32'b?????_?????_?????_1011100000_1010011 -`define FC_EQ_D 32'b?????_?????_?????_1010100001_1010011 -`define FC_LT_D 32'b?????_?????_?????_1011000001_1010011 -`define FC_LE_D 32'b?????_?????_?????_1011100001_1010011 -`define MFF_S 32'b?????_00000_?????_1100001000_1010011 -`define MFF_D 32'b?????_00000_?????_1100001001_1010011 -`define MFFL_D 32'b?????_00000_?????_1100101001_1010011 -`define MFFH_D 32'b?????_00000_?????_1101001001_1010011 -`define MTF_S 32'b?????_?????_00000_1110001000_1010011 -`define MTF_D 32'b?????_?????_00000_1110001001_1010011 -`define MTFLH_D 32'b?????_?????_?????_1110001101_1010011 +`define FCVT_D_S 32'b?????_?????_00000_1000011101_1010011 +`define FC_EQ_S 32'b?????_?????_?????_1010111100_1010011 +`define FC_LT_S 32'b?????_?????_?????_1011011100_1010011 +`define FC_LE_S 32'b?????_?????_?????_1011111100_1010011 +`define FC_EQ_D 32'b?????_?????_?????_1010111101_1010011 +`define FC_LT_D 32'b?????_?????_?????_1011011101_1010011 +`define FC_LE_D 32'b?????_?????_?????_1011111101_1010011 +`define MFF_S 32'b?????_00000_?????_1100011100_1010011 +`define MFF_D 32'b?????_00000_?????_1100011101_1010011 +`define MFFL_D 32'b?????_00000_?????_1100111101_1010011 +`define MFFH_D 32'b?????_00000_?????_1101011101_1010011 +`define MFFSR 32'b?????_00000_00000_1101111100_1010011 +`define MTF_S 32'b?????_?????_00000_1110011100_1010011 +`define MTF_D 32'b?????_?????_?????_1110011101_1010011 +`define MTFSR 32'b00000_?????_00000_1110111100_1010011 `define LF_W 32'b?????_?????_????????????_010_0000111 `define LF_D 32'b?????_?????_????????????_011_0000111 `define SF_W 32'b?????_?????_?????_???????_010_0100111 diff --git a/instr-table.tex b/instr-table.tex index c29f39a..62ed2b8 100644 --- a/instr-table.tex +++ b/instr-table.tex @@ -844,24 +844,6 @@ \cline{2-10} -& -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rd} & MFCR rd,rs2 \\ -\cline{2-10} - - -& -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{00000} & MTCR rs1,rs2 \\ -\cline{2-10} - - & \multicolumn{1}{|c|}{0000000} & \multicolumn{5}{c|}{0000000000} & @@ -1375,8 +1357,8 @@ \multicolumn{1}{|c|}{0000000} & \multicolumn{5}{c|}{0000000011} & \multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MTF.S rd,rs1 \\ +\multicolumn{1}{c|}{00000} & +\multicolumn{1}{c|}{rd} & MFFSR rd \\ \cline{2-10} @@ -1385,7 +1367,7 @@ \multicolumn{5}{c|}{0000000011} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MTF.D rd,rs1 \\ +\multicolumn{1}{c|}{rd} & MTF.S rd,rs1 \\ \cline{2-10} @@ -1394,7 +1376,16 @@ \multicolumn{5}{c|}{0000000011} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MTFLH.D rd,rs1,rs2 \\ +\multicolumn{1}{c|}{rd} & MTF.D rd,rs1,rs2 \\ +\cline{2-10} + + +& +\multicolumn{1}{|c|}{0000000} & +\multicolumn{5}{c|}{0000000011} & +\multicolumn{1}{c|}{00000} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{00000} & MTFSR rs1 \\ \cline{2-10} @@ -1815,15 +1806,6 @@ \cline{2-10} -& -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000011} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MTFLH.D rd,rs1,rs2 \\ -\cline{2-10} - - & \multicolumn{1}{|c|}{0000000} & \multicolumn{5}{c|}{0000000011} & @@ -1836,9 +1818,9 @@ & \multicolumn{1}{|c|}{0000000} & \multicolumn{5}{c|}{0000000011} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MTF.D rd,rs1 \\ +\multicolumn{1}{c|}{rd} & MTF.D rd,rs1,rs2 \\ \cline{2-10} diff --git a/opcodes b/opcodes index bfb21f6..bce7c76 100644 --- a/opcodes +++ b/opcodes @@ -107,8 +107,6 @@ amominu.d rd rs1 rs2 16..10=6 9..7=3 6..2=0x10 1..0=3 amomaxu.d rd rs1 rs2 16..10=7 9..7=3 6..2=0x10 1..0=3 rdnpc rd 26..22=0 21..17=0 16..10=0 9..7=0 6..2=0x05 1..0=3 -mfcr rd 26..22=0 rs2 16..10=0 9..7=1 6..2=0x05 1..0=3 -mtcr 31..27=0 rs1 rs2 16..10=1 9..7=1 6..2=0x05 1..0=3 sync 31..27=0 26..22=0 21..17=0 16..10=0 9..7=2 6..2=0x05 1..0=3 syscall 31..27=0 26..22=0 imm12 9..7=3 6..2=0x05 1..0=3 @@ -125,18 +123,18 @@ fsub.s rd rs1 rs2 16..12=1 rm 8..7=0 6..2=0x14 1..0=3 fmul.s rd rs1 rs2 16..12=2 rm 8..7=0 6..2=0x14 1..0=3 fdiv.s rd rs1 rs2 16..12=3 rm 8..7=0 6..2=0x14 1..0=3 fsqrt.s rd rs1 21..17=0 16..12=4 rm 8..7=0 6..2=0x14 1..0=3 -fsinj.s rd rs1 rs2 16..12=5 11..9=0 8..7=0 6..2=0x14 1..0=3 -fsinjn.s rd rs1 rs2 16..12=6 11..9=0 8..7=0 6..2=0x14 1..0=3 -fsmul.s rd rs1 rs2 16..12=7 11..9=0 8..7=0 6..2=0x14 1..0=3 +fsinj.s rd rs1 rs2 16..12=5 11..9=7 8..7=0 6..2=0x14 1..0=3 +fsinjn.s rd rs1 rs2 16..12=6 11..9=7 8..7=0 6..2=0x14 1..0=3 +fsmul.s rd rs1 rs2 16..12=7 11..9=7 8..7=0 6..2=0x14 1..0=3 fadd.d rd rs1 rs2 16..12=0x0 rm 8..7=1 6..2=0x14 1..0=3 fsub.d rd rs1 rs2 16..12=0x1 rm 8..7=1 6..2=0x14 1..0=3 fmul.d rd rs1 rs2 16..12=0x2 rm 8..7=1 6..2=0x14 1..0=3 fdiv.d rd rs1 rs2 16..12=0x3 rm 8..7=1 6..2=0x14 1..0=3 fsqrt.d rd rs1 21..17=0 16..12=0x4 rm 8..7=1 6..2=0x14 1..0=3 -fsinj.d rd rs1 rs2 16..12=0x5 11..9=0 8..7=1 6..2=0x14 1..0=3 -fsinjn.d rd rs1 rs2 16..12=0x6 11..9=0 8..7=1 6..2=0x14 1..0=3 -fsmul.d rd rs1 rs2 16..12=0x7 11..9=0 8..7=1 6..2=0x14 1..0=3 +fsinj.d rd rs1 rs2 16..12=0x5 11..9=7 8..7=1 6..2=0x14 1..0=3 +fsinjn.d rd rs1 rs2 16..12=0x6 11..9=7 8..7=1 6..2=0x14 1..0=3 +fsmul.d rd rs1 rs2 16..12=0x7 11..9=7 8..7=1 6..2=0x14 1..0=3 fcvt.l.s rd rs1 21..17=0 16..12=0x8 rm 8..7=0 6..2=0x14 1..0=3 fcvtu.l.s rd rs1 21..17=0 16..12=0x9 rm 8..7=0 6..2=0x14 1..0=3 @@ -155,27 +153,28 @@ fcvtu.s.w rd rs1 21..17=0 16..12=0xF rm 8..7=0 6..2=0x14 1..0=3 fcvt.d.l rd rs1 21..17=0 16..12=0xC rm 8..7=1 6..2=0x14 1..0=3 fcvtu.d.l rd rs1 21..17=0 16..12=0xD rm 8..7=1 6..2=0x14 1..0=3 -fcvt.d.w rd rs1 21..17=0 16..12=0xE 11..9=0 8..7=1 6..2=0x14 1..0=3 -fcvtu.d.w rd rs1 21..17=0 16..12=0xF 11..9=0 8..7=1 6..2=0x14 1..0=3 +fcvt.d.w rd rs1 21..17=0 16..12=0xE 11..9=7 8..7=1 6..2=0x14 1..0=3 +fcvtu.d.w rd rs1 21..17=0 16..12=0xF 11..9=7 8..7=1 6..2=0x14 1..0=3 fcvt.s.d rd rs1 21..17=0 16..14=0x4 13..12=1 rm 8..7=0 6..2=0x14 1..0=3 -fcvt.d.s rd rs1 21..17=0 16..14=0x4 13..12=0 11..9=0 8..7=1 6..2=0x14 1..0=3 - -fc.eq.s rd rs1 rs2 16..12=0x15 11..9=0 8..7=0 6..2=0x14 1..0=3 -fc.lt.s rd rs1 rs2 16..12=0x16 11..9=0 8..7=0 6..2=0x14 1..0=3 -fc.le.s rd rs1 rs2 16..12=0x17 11..9=0 8..7=0 6..2=0x14 1..0=3 - -fc.eq.d rd rs1 rs2 16..12=0x15 11..9=0 8..7=1 6..2=0x14 1..0=3 -fc.lt.d rd rs1 rs2 16..12=0x16 11..9=0 8..7=1 6..2=0x14 1..0=3 -fc.le.d rd rs1 rs2 16..12=0x17 11..9=0 8..7=1 6..2=0x14 1..0=3 - -mff.s rd 26..22=0 rs2 16..12=0x18 11..9=2 8..7=0 6..2=0x14 1..0=3 -mff.d rd 26..22=0 rs2 16..12=0x18 11..9=2 8..7=1 6..2=0x14 1..0=3 -mffl.d rd 26..22=0 rs2 16..12=0x19 11..9=2 8..7=1 6..2=0x14 1..0=3 -mffh.d rd 26..22=0 rs2 16..12=0x1A 11..9=2 8..7=1 6..2=0x14 1..0=3 -mtf.s rd rs1 21..17=0 16..12=0x1C 11..9=2 8..7=0 6..2=0x14 1..0=3 -mtf.d rd rs1 21..17=0 16..12=0x1C 11..9=2 8..7=1 6..2=0x14 1..0=3 -mtflh.d rd rs1 rs2 16..12=0x1C 11..9=3 8..7=1 6..2=0x14 1..0=3 +fcvt.d.s rd rs1 21..17=0 16..14=0x4 13..12=0 11..9=7 8..7=1 6..2=0x14 1..0=3 + +fc.eq.s rd rs1 rs2 16..12=0x15 11..9=7 8..7=0 6..2=0x14 1..0=3 +fc.lt.s rd rs1 rs2 16..12=0x16 11..9=7 8..7=0 6..2=0x14 1..0=3 +fc.le.s rd rs1 rs2 16..12=0x17 11..9=7 8..7=0 6..2=0x14 1..0=3 + +fc.eq.d rd rs1 rs2 16..12=0x15 11..9=7 8..7=1 6..2=0x14 1..0=3 +fc.lt.d rd rs1 rs2 16..12=0x16 11..9=7 8..7=1 6..2=0x14 1..0=3 +fc.le.d rd rs1 rs2 16..12=0x17 11..9=7 8..7=1 6..2=0x14 1..0=3 + +mff.s rd 26..22=0 rs2 16..12=0x18 11..9=7 8..7=0 6..2=0x14 1..0=3 +mff.d rd 26..22=0 rs2 16..12=0x18 11..9=7 8..7=1 6..2=0x14 1..0=3 +mffl.d rd 26..22=0 rs2 16..12=0x19 11..9=7 8..7=1 6..2=0x14 1..0=3 +mffh.d rd 26..22=0 rs2 16..12=0x1A 11..9=7 8..7=1 6..2=0x14 1..0=3 +mffsr rd 26..22=0 21..17=0 16..12=0x1B 11..9=7 8..7=0 6..2=0x14 1..0=3 +mtf.s rd rs1 21..17=0 16..12=0x1C 11..9=7 8..7=0 6..2=0x14 1..0=3 +mtf.d rd rs1 rs2 16..12=0x1C 11..9=7 8..7=1 6..2=0x14 1..0=3 +mtfsr 31..27=0 rs1 21..17=0 16..12=0x1D 11..9=7 8..7=0 6..2=0x14 1..0=3 lf.w rd rs1 imm12 9..7=2 6..2=0x01 1..0=3 lf.d rd rs1 imm12 9..7=3 6..2=0x01 1..0=3 -- cgit v1.2.3