riscv-opcodes - RISC-V opcodes

	Commit message (Collapse)	Author	Age
*	vxcpthold exposes the first source operand	Yunsup Lee	2015-03-16
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*	add hwacha vfmsv instructions	Yunsup Lee	2014-03-02
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*	Add vfmvv, vfmsv instructions, remove vsetprec	Quan Nguyen	2014-02-03
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*	Move microthread-specific opcodes to opcodes-hwacha-ut	Quan Nguyen	2014-01-21
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*	Add vsetprec instruction	Quan Nguyen	2013-11-29
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*	add hwacha exception support	Yunsup Lee	2013-10-17
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*	custom-1 opcodes are now 0x0A	Yunsup Lee	2013-10-17
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*	revamp hwacha-v3 opcodes	Yunsup Lee	2013-10-10
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*	hwacha v3: inst format follows the new rocket accelerator extensions	Yunsup Lee	2013-08-07
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*	Factor out Hwacha/RVC and rename MFTX/MXTF to FMV	Andrew Waterman	2013-07-26