diff options
| author |  nick <nick@b3059339-0415-0410-9bf9-f77b7e298cf2> | 2002-01-30 09:18:41 +0000 |
|---|---|---|
| committer | nick <nick@b3059339-0415-0410-9bf9-f77b7e298cf2> | 2002-01-30 09:18:41 +0000 |
| commit | 6256b7ff77923f3d19b271b614de2b20ea1b7a6f (patch) | |
| tree | 9d47115d804e7e7f50d1c963c09431f12bb3eeca /vidix | |
| parent | f65f496b283afe9a266c8814a0c2cbafcb1f6899 (diff) | |
More correct double_buffering for packed fourcc
git-svn-id: svn://svn.mplayerhq.hu/mplayer/trunk@4415 b3059339-0415-0410-9bf9-f77b7e298cf2
Diffstat (limited to 'vidix')
| -rw-r--r-- | vidix/drivers/radeon_vid.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/vidix/drivers/radeon_vid.c b/vidix/drivers/radeon_vid.c index bf5db3f72f..4d916bd01c 100644 --- a/vidix/drivers/radeon_vid.c +++ b/vidix/drivers/radeon_vid.c @@ -954,20 +954,23 @@ static int radeon_vid_init_video( vidix_playback_t *config ) config->offset.u = config->offset.v; config->offset.v = tmp; } + besr.vid_buf3_base_adrs = besr.vid_buf0_base_adrs+config->frame_size; + besr.vid_buf4_base_adrs = besr.vid_buf1_base_adrs+config->frame_size; + besr.vid_buf5_base_adrs = besr.vid_buf2_base_adrs+config->frame_size; } else { besr.vid_buf0_base_adrs = radeon_overlay_off; config->offset.y = config->offset.u = config->offset.v = ((left & ~7) << 1)&VIF_BUF0_BASE_ADRS_MASK; besr.vid_buf0_base_adrs += config->offset.y; - besr.vid_buf1_base_adrs = besr.vid_buf0_base_adrs; + besr.vid_buf1_base_adrs = besr.vid_buf0_base_adrs+config->frame_size; besr.vid_buf2_base_adrs = besr.vid_buf0_base_adrs; + besr.vid_buf3_base_adrs = besr.vif_buf0_base_adrs+config->frame_size; + besr.vid_buf4_base_adrs = besr.vid_buf0_base_adrs; + besr.vid_buf5_base_adrs = besr.vid_buf0_base_adrs+config->frame_size; } config->offsets[0] = 0; config->offsets[1] = config->frame_size; - besr.vid_buf3_base_adrs = besr.vid_buf0_base_adrs+config->frame_size; - besr.vid_buf4_base_adrs = besr.vid_buf1_base_adrs+config->frame_size; - besr.vid_buf5_base_adrs = besr.vid_buf2_base_adrs+config->frame_size; tmp = (left & 0x0003ffff) + 0x00028000 + (h_inc << 3); besr.p1_h_accum_init = ((tmp << 4) & 0x000f8000) | |