Commit message (Collapse) | Author | Age | |
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* | Check if /sys/devices/system/cpu/intel_pstate/no_turbo exists before ↵ | 2017-09-16 | |
| | | | | searching it | ||
* | Fix assembly | 2017-09-12 | |
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* | WIP on reg alloc for asm output | 2017-09-11 | |
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* | Fix (hopefully) overlap in reg | 2017-09-05 | |
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* | Fix schedule to be in correct order | 2017-09-05 | |
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* | WIP | 2017-09-05 | |
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* | Fix schedule | 2017-09-05 | |
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* | WIP on reg alloc | 2017-09-04 | |
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* | chmod +x | 2017-09-04 | |
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* | Add display files (temporary, kind-of) | 2017-09-04 | |
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* | WIP Update compile with registers | 2017-09-04 | |
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* | More WIP on register allocation | 2017-08-17 | |
| | | | | | | | | | | The current allocation is terrible, probably because we are currently requiring that all instructions output to registers. My current guess at a decent thing to do is to make a pass, after register allocation, and eliminate all registers that simply get stored to memory, replacing the relevant instructions with the memory-using versions. Then we can re-register allocate, ignoring values that go straight to memory. | ||
* | Handle most of register allocation | 2017-08-14 | |
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* | Handle equality in parsing | 2017-08-14 | |
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* | Fixup header and footer | 2017-08-14 | |
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* | Update scheduler to know about implicit mulx arg | 2017-08-14 | |
| | | | | | Now it prefers putting together mulx with the same implicit arg (approximated as the same variable with the lower number). | ||
* | Use a more realistic processor model | 2017-08-13 | |
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* | Revert "Revert "Subset compiler differently"" | 2017-08-13 | |
| | | | | This reverts commit c8c82f2edf416b667ba487dfa2cff0795d37cbe6. | ||
* | Revert "Subset compiler differently" | 2017-08-13 | |
| | | | | This reverts commit 7038444e6515ec51a3b6d1cdfe972664d3f16c81. | ||
* | Subset compiler differently | 2017-08-13 | |
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* | Add heuristic search | 2017-08-13 | |
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* | Update the graph maker | 2017-08-13 | |
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* | Update exhaustive search compiler | 2017-08-13 | |
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* | Add memoize.py to zinc compiler folder | 2017-08-11 | |
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* | wip on register allocation in python | 2017-08-09 | |
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* | Fix the sense of dependencies in zinc generation | 2017-08-09 | |
| | | | | | This brings the maximum window size back down to 53, so we use the old method of making dependencies, rather than the new one. | ||
* | Get all scheduling done in one frame | 2017-08-09 | |
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* | Fix wip | 2017-08-09 | |
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* | Larger instruction window for zinc | 2017-08-09 | |
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* | Add a faster version of the zinc compiler | 2017-08-06 | |
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* | Add initial stab at C-compilation by optimization | 2017-08-06 | |
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* | Fix format warning in gcc | 2017-07-08 | |
| | | | | Part of #227 | ||
* | Don't remove Adam Langley when anonymizing repo | 2017-07-06 | |
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* | s/bash/sh | 2017-07-05 | |
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* | etc: add scripts to control turbo boost and hyper threading | 2017-07-05 | |
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* | benchmarking: correct for differences in CPU and TSC frequency | 2017-07-05 | |
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* | don't key benchmarks on cpu frequency | 2017-06-18 | |
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* | handle missing /sys/class/power_supply/AC | 2017-06-18 | |
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* | more sh portability fixes... | 2017-06-18 | |
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* | "make bench", currently just X25519-C64 (closes #185) | 2017-06-18 | |
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* | Bump coq-scripts | 2017-06-06 | |
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* | Unrevert the coq-scripts module again | 2017-04-14 | |
| | | | | cc @andres-erbsen | ||
* | stronger ladderstep correctness proof courtesy Teo | 2017-04-14 | |
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* | Revert "update coq-scripts" | 2017-04-13 | |
| | | | | | | | | This reverts commit 96d5cedb2cd194e15711ff5b284380539b9a9d99. That commit broke the `lite` target and the `printreversedeps` target, and reverted 2ad2524dba1321e3facdba3c1142e7e7fbbe1634, among other commits. | ||
* | update coq-scripts | 2017-04-12 | |
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* | Fix vo_reverse_closure | 2017-04-09 | |
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* | Add printreversedeps | 2017-04-09 | |
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* | Bump submodule for better travis timing logs | 2017-01-31 | |
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* | Don't let travis kill us in 10 minutes of silence | 2016-11-18 | |
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* | Also redact mit-plv and fiat-crypto | 2016-11-15 | |
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