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* Merged in ezhulenev/eigen-01 (pull request PR-633)Gravatar Rasmus Larsen2019-04-29
|\ | | | | | | Check if gpu_assert was overridden in TensorGpuHipCudaDefines
| * Check if gpu_assert was overridden in TensorGpuHipCudaDefinesGravatar Eugene Zhulenev2019-04-25
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* | Fix doxygen warnings to enable statis code analysisGravatar Eugene Zhulenev2019-04-24
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* Remove deprecation annotation from typedef Eigen::Index Index, as it would ↵Gravatar Rasmus Munk Larsen2019-04-24
| | | | generate too many build warnings.
* Add missing EIGEN_DEPRECATED annotations to deprecated functions and fix few ↵Gravatar Eugene Zhulenev2019-04-23
| | | | other doxygen warnings
* Adding lowlevel APIs for optimized RHS packet load in TensorFlowGravatar Anuj Rawat2019-04-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SpatialConvolution Low-level APIs are added in order to optimized packet load in gemm_pack_rhs in TensorFlow SpatialConvolution. The optimization is for scenario when a packet is split across 2 adjacent columns. In this case we read it as two 'partial' packets and then merge these into 1. Currently this only works for Packet16f (AVX512) and Packet8f (AVX2). We plan to add this for other packet types (such as Packet8d) also. This optimization shows significant speedup in SpatialConvolution with certain parameters. Some examples are below. Benchmark parameters are specified as: Batch size, Input dim, Depth, Num of filters, Filter dim Speedup numbers are specified for number of threads 1, 2, 4, 8, 16. AVX512: Parameters | Speedup (Num of threads: 1, 2, 4, 8, 16) ----------------------------|------------------------------------------ 128, 24x24, 3, 64, 5x5 |2.18X, 2.13X, 1.73X, 1.64X, 1.66X 128, 24x24, 1, 64, 8x8 |2.00X, 1.98X, 1.93X, 1.91X, 1.91X 32, 24x24, 3, 64, 5x5 |2.26X, 2.14X, 2.17X, 2.22X, 2.33X 128, 24x24, 3, 64, 3x3 |1.51X, 1.45X, 1.45X, 1.67X, 1.57X 32, 14x14, 24, 64, 5x5 |1.21X, 1.19X, 1.16X, 1.70X, 1.17X 128, 128x128, 3, 96, 11x11 |2.17X, 2.18X, 2.19X, 2.20X, 2.18X AVX2: Parameters | Speedup (Num of threads: 1, 2, 4, 8, 16) ----------------------------|------------------------------------------ 128, 24x24, 3, 64, 5x5 | 1.66X, 1.65X, 1.61X, 1.56X, 1.49X 32, 24x24, 3, 64, 5x5 | 1.71X, 1.63X, 1.77X, 1.58X, 1.68X 128, 24x24, 1, 64, 5x5 | 1.44X, 1.40X, 1.38X, 1.37X, 1.33X 128, 24x24, 3, 64, 3x3 | 1.68X, 1.63X, 1.58X, 1.56X, 1.62X 128, 128x128, 3, 96, 11x11 | 1.36X, 1.36X, 1.37X, 1.37X, 1.37X In the higher level benchmark cifar10, we observe a runtime improvement of around 6% for AVX512 on Intel Skylake server (8 cores). On lower level PackRhs micro-benchmarks specified in TensorFlow tensorflow/core/kernels/eigen_spatial_convolutions_test.cc, we observe the following runtime numbers: AVX512: Parameters | Runtime without patch (ns) | Runtime with patch (ns) | Speedup ---------------------------------------------------------------|----------------------------|-------------------------|--------- BM_RHS_NAME(PackRhs, 128, 24, 24, 3, 64, 5, 5, 1, 1, 256, 56) | 41350 | 15073 | 2.74X BM_RHS_NAME(PackRhs, 32, 64, 64, 32, 64, 5, 5, 1, 1, 256, 56) | 7277 | 7341 | 0.99X BM_RHS_NAME(PackRhs, 32, 64, 64, 32, 64, 5, 5, 2, 2, 256, 56) | 8675 | 8681 | 1.00X BM_RHS_NAME(PackRhs, 32, 64, 64, 30, 64, 5, 5, 1, 1, 256, 56) | 24155 | 16079 | 1.50X BM_RHS_NAME(PackRhs, 32, 64, 64, 30, 64, 5, 5, 2, 2, 256, 56) | 25052 | 17152 | 1.46X BM_RHS_NAME(PackRhs, 32, 256, 256, 4, 16, 8, 8, 1, 1, 256, 56) | 18269 | 18345 | 1.00X BM_RHS_NAME(PackRhs, 32, 256, 256, 4, 16, 8, 8, 2, 4, 256, 56) | 19468 | 19872 | 0.98X BM_RHS_NAME(PackRhs, 32, 64, 64, 4, 16, 3, 3, 1, 1, 36, 432) | 156060 | 42432 | 3.68X BM_RHS_NAME(PackRhs, 32, 64, 64, 4, 16, 3, 3, 2, 2, 36, 432) | 132701 | 36944 | 3.59X AVX2: Parameters | Runtime without patch (ns) | Runtime with patch (ns) | Speedup ---------------------------------------------------------------|----------------------------|-------------------------|--------- BM_RHS_NAME(PackRhs, 128, 24, 24, 3, 64, 5, 5, 1, 1, 256, 56) | 26233 | 12393 | 2.12X BM_RHS_NAME(PackRhs, 32, 64, 64, 32, 64, 5, 5, 1, 1, 256, 56) | 6091 | 6062 | 1.00X BM_RHS_NAME(PackRhs, 32, 64, 64, 32, 64, 5, 5, 2, 2, 256, 56) | 7427 | 7408 | 1.00X BM_RHS_NAME(PackRhs, 32, 64, 64, 30, 64, 5, 5, 1, 1, 256, 56) | 23453 | 20826 | 1.13X BM_RHS_NAME(PackRhs, 32, 64, 64, 30, 64, 5, 5, 2, 2, 256, 56) | 23167 | 22091 | 1.09X BM_RHS_NAME(PackRhs, 32, 256, 256, 4, 16, 8, 8, 1, 1, 256, 56) | 23422 | 23682 | 0.99X BM_RHS_NAME(PackRhs, 32, 256, 256, 4, 16, 8, 8, 2, 4, 256, 56) | 23165 | 23663 | 0.98X BM_RHS_NAME(PackRhs, 32, 64, 64, 4, 16, 3, 3, 1, 1, 36, 432) | 72689 | 44969 | 1.62X BM_RHS_NAME(PackRhs, 32, 64, 64, 4, 16, 3, 3, 2, 2, 36, 432) | 61732 | 39779 | 1.55X All benchmarks on Intel Skylake server with 8 cores.
* Tweak cost model for tensor contraction when parallelizing over the inner ↵Gravatar Rasmus Munk Larsen2019-04-12
| | | | | | dimension. https://bitbucket.org/snippets/rmlarsen/MexxLo
* Update TheadPoolDevice example to include ThreadPool creation and passing ↵Gravatar Jonathon Koyle2019-04-10
| | | | pointer into constructor.
* adding EIGEN_DEVICE_FUNC to the recently added TensorContractionKernel ↵Gravatar Deven Desai2019-04-08
| | | | constructor. Not having the EIGEN_DEVICE_FUNC attribute on it was leading to compiler errors when compiling Eigen in the ROCm/HIP path
* Add missing semicolonGravatar Eugene Zhulenev2019-04-02
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* Add support for custom packed Lhs/Rhs blocks in tensor contractionsGravatar Eugene Zhulenev2019-04-01
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* Merged eigen/eigen into defaultGravatar Deven Desai2019-03-19
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| * Fix include guard commentsGravatar David Tellenbach2019-03-15
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| * Fix segfaults with cuda compilationGravatar Eugene Zhulenev2019-03-11
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| * Fix a bug in TensorGenerator for 1d tensorsGravatar Eugene Zhulenev2019-03-11
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| * Fix a data race in NonBlockingThreadPoolGravatar Eugene Zhulenev2019-03-11
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| * Change license from LGPL to MPL2 with agreement from David Harmon.Gravatar Gael Guennebaud2019-03-07
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| * Merge.Gravatar Rasmus Munk Larsen2019-03-06
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| * | Add macro EIGEN_AVOID_THREAD_LOCAL to make it possible to manually disable ↵Gravatar Rasmus Munk Larsen2019-03-06
| | | | | | | | | | | | the use of thread_local.
| | * Fix placement of "#if defined(EIGEN_GPUCC)" guard region.Gravatar Rasmus Munk Larsen2019-03-06
| | |\ | | | | | | | | | | | | | | | | | | | | Found with -Wundefined-func-template. Author: tkoeppe@google.com
| | * | Fix placement of "#if defined(EIGEN_GPUCC)" guard region.Gravatar Rasmus Munk Larsen2019-03-06
| |/ / | | | | | | | | | | | | | | | Found with -Wundefined-func-template. Author: tkoeppe@google.com
| | * Add missing return to NonBlockingThreadPool::LocalStealGravatar Eugene Zhulenev2019-03-06
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| | * Remove redundant steal loopGravatar Eugene Zhulenev2019-03-06
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| * Check that inner block dimension is continuousGravatar Eugene Zhulenev2019-03-05
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| * Block evaluation for TensorGeneratorOpGravatar Eugene Zhulenev2019-03-05
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| * Tune tensor contraction threadpool heuristicsGravatar Eugene Zhulenev2019-03-05
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| * Add an extra check for the RunQueue size estimateGravatar Eugene Zhulenev2019-03-05
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| * Do not create Tensor<const T> in cxx11_tensor_forced_eval testGravatar Eugene Zhulenev2019-03-05
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| * Do not initialize invalid fast_strides in TensorGeneratorOpGravatar Eugene Zhulenev2019-03-04
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| * Add tiled evaluation for TensorForcedEvalOpGravatar Eugene Zhulenev2019-03-04
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| * Use fast divisors in TensorGeneratorOpGravatar Eugene Zhulenev2019-03-04
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| * Fix specialization for conjugate on non-complex types in TensorBase.h.Gravatar Rasmus Munk Larsen2019-03-01
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| * Improve EventCount used by the non-blocking threadpool.Gravatar Rasmus Munk Larsen2019-02-22
| | | | | | | | | | | | | | | | | | | | The current algorithm requires threads to commit/cancel waiting in order they called Prewait. Spinning caused by that serialization can consume lots of CPU time on some workloads. Restructure the algorithm to not require that serialization and remove spin waits from Commit/CancelWait. Note: this reduces max number of threads from 2^16 to 2^14 to leave more space for ABA counter (which is now 22 bits). Implementation details are explained in comments.
| * Fix conversion warningsGravatar Gael Guennebaud2019-02-19
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| * Fix incorrect value of NumDimensions in TensorContraction traits.Gravatar Rasmus Munk Larsen2019-02-19
| | | | | | | | Reported here: #1671
| * Merged in ezhulenev/eigen-01 (pull request PR-590)Gravatar Rasmus Larsen2019-02-14
| |\ | | | | | | | | | Do not generate no-op cast() and conjugate() expressions
| * | Fix signed-unsigned return in RuqQueueGravatar Eugene Zhulenev2019-02-14
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| * | Fix signed-unsigned comparison warning in RunQueueGravatar Eugene Zhulenev2019-02-14
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| | * Do not generate no-op cast() and conjugate() expressionsGravatar Eugene Zhulenev2019-02-14
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| * Speedup Tensor ThreadPool RunQueu::Empty()Gravatar Eugene Zhulenev2019-02-13
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| * Add PacketConv implementation for non-vectorizable src expressionsGravatar Eugene Zhulenev2019-02-08
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| * Optimize TensorConversion evaluator: do not convert same typeGravatar Eugene Zhulenev2019-02-08
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| * Spline.h: fix spelling "spang" -> "span"Gravatar Steven Peters2019-02-08
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| * Don't do parallel_pack if we can use thread_local memory in tensor contractionsGravatar Eugene Zhulenev2019-02-07
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| * Do not reduce parallelism too much in contractions with small number of threadsGravatar Eugene Zhulenev2019-02-04
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| * Parallelize tensor contraction only by sharding dimension and use ↵Gravatar Eugene Zhulenev2019-02-04
| | | | | | | | 'thread-local' memory for packing
| * Workaround lack of support for arbitrary packet-type in Tensor by manually ↵Gravatar Gael Guennebaud2019-01-30
| | | | | | | | loading half/quarter packets in tensor contraction mapper.
| * Hide some annoying unused variable warnings in g++8.1Gravatar Christoph Hertzberg2019-01-29
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| * Renaming even more `I` identifiersGravatar Christoph Hertzberg2019-01-26
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| * Avoid `I` as an identifier, since it may clash with the C-header complex.hGravatar Christoph Hertzberg2019-01-25
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