| Commit message (Collapse) | Author | Age |
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Adds copy constructors to Tensor ops, inherits assignment operators from
`TensorBase`.
Addresses #1863
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expose pmul/add/div/min/max on host
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module required to run it on devices supporting SYCL.
* Abstracting the pointer type so that both SYCL memory and pointer can be captured.
* Converting SYCL virtual pointer to SYCL device memory in Eigen evaluator class.
* Binding SYCL placeholder accessor to command group handler by using bind method in Eigen evaluator node.
* Adding SYCL macro for controlling loop unrolling.
* Modifying the TensorDeviceSycl.h and SYCL executor method to adopt the above changes.
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There are two major changes (and a few minor ones which are not listed here...see PR discussion for details)
1. Eigen::half implementations for HIP and CUDA have been merged.
This means that
- `CUDA/Half.h` and `HIP/hcc/Half.h` got merged to a new file `GPU/Half.h`
- `CUDA/PacketMathHalf.h` and `HIP/hcc/PacketMathHalf.h` got merged to a new file `GPU/PacketMathHalf.h`
- `CUDA/TypeCasting.h` and `HIP/hcc/TypeCasting.h` got merged to a new file `GPU/TypeCasting.h`
After this change the `HIP/hcc` directory only contains one file `math_constants.h`. That will go away too once that file becomes a part of the HIP install.
2. new macros EIGEN_GPUCC, EIGEN_GPU_COMPILE_PHASE and EIGEN_HAS_GPU_FP16 have been added and the code has been updated to use them where appropriate.
- `EIGEN_GPUCC` is the same as `(EIGEN_CUDACC || EIGEN_HIPCC)`
- `EIGEN_GPU_DEVICE_COMPILE` is the same as `(EIGEN_CUDA_ARCH || EIGEN_HIP_DEVICE_COMPILE)`
- `EIGEN_HAS_GPU_FP16` is the same as `(EIGEN_HAS_CUDA_FP16 or EIGEN_HAS_HIP_FP16)`
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This commit enables the use of Eigen on HIP kernels / AMD GPUs. Support has been added along the same lines as what already exists for using Eigen in CUDA kernels / NVidia GPUs.
Application code needs to explicitly define EIGEN_USE_HIP when using Eigen in HIP kernels. This is because some of the CUDA headers get picked up by default during Eigen compile (irrespective of whether or not the underlying compiler is CUDACC/NVCC, for e.g. Eigen/src/Core/arch/CUDA/Half.h). In order to maintain this behavior, the EIGEN_USE_HIP macro is used to switch to using the HIP version of those header files (see Eigen/Core and unsupported/Eigen/CXX11/Tensor)
Use the "-DEIGEN_TEST_HIP" cmake option to enable the HIP specific unit tests.
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aliases
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sycl; fixing the address space issue for const TensorMap; converting all discard_write to write due to data missmatch.
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sycl; cleaning up the sycl backend.
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the [] operator to index a tensor. Added unit tests to validate the use of std::map and a few more types as valid custom index containers
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types in addition to arrays of indices
Only compile the custom index code when EIGEN_HAS_SFINAE is defined. For the time beeing, EIGEN_HAS_SFINAE is a synonym for EIGEN_HAS_VARIADIC_TEMPLATES, but this might evolve in the future.
Moved some code around.
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user: Gabriel Nützi <gnuetzi@gmx.ch>
branch 'default'
changed unsupported/Eigen/CXX11/src/Tensor/Tensor.h
changed unsupported/Eigen/CXX11/src/Tensor/TensorMeta.h
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using Sfinae and is_base_of to select correct template which converts to array<Index,NumIndices>
user: Gabriel Nützi <gnuetzi@gmx.ch>
branch 'default'
added unsupported/Eigen/CXX11/src/Tensor/TensorMetaMacros.h
added unsupported/test/cxx11_tensor_customIndex.cpp
changed unsupported/Eigen/CXX11/Tensor
changed unsupported/Eigen/CXX11/src/Tensor/Tensor.h
changed unsupported/Eigen/CXX11/src/Tensor/TensorMeta.h
changed unsupported/test/CMakeLists.txt
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several tensor operations.
Created the TensorDimensionList class to encode the list of all the dimensions of a tensor of rank n. This could be done using TensorIndexList, however TensorIndexList require cxx11 which isn't yet supported as widely as we'd like.
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