From e8eba665eaa2befeab7edc54646dc5cd02b6e472 Mon Sep 17 00:00:00 2001 From: Alexey Yakovenko Date: Sun, 27 Jun 2010 21:33:12 +0200 Subject: ao psf2 spu reentrancy --- plugins/ao/eng_psf/peops2/registers2.c | 718 ++++++++++++++++----------------- 1 file changed, 358 insertions(+), 360 deletions(-) (limited to 'plugins/ao/eng_psf/peops2/registers2.c') diff --git a/plugins/ao/eng_psf/peops2/registers2.c b/plugins/ao/eng_psf/peops2/registers2.c index 7eec264b..42fa3238 100644 --- a/plugins/ao/eng_psf/peops2/registers2.c +++ b/plugins/ao/eng_psf/peops2/registers2.c @@ -45,6 +45,7 @@ #include "../peops2/registers.h" #include "../peops2/regs.h" #include "../peops2/reverb.h" +#include "../peops2/spu.h" #include "../psx.h" /* @@ -65,22 +66,16 @@ #define SUSTAIN_MS 441L #define RELEASE_MS 437L -// Prototypes -void SetVolumeL(unsigned char ch,short vol); -void SetVolumeR(unsigned char ch,short vol); -void ReverbOn(int start,int end,unsigned short val,int iRight); -void SetReverbAddr(int core); -void VolumeOn(int start,int end,unsigned short val,int iRight); - //////////////////////////////////////////////////////////////////////// // WRITE REGISTERS: called by main emu //////////////////////////////////////////////////////////////////////// EXPORT_GCC void CALLBACK SPU2write(mips_cpu_context *cpu, unsigned long reg, unsigned short val) { + spu2_state_t *spu = cpu->spu2; long r=reg&0xffff; - regArea[r>>1] = val; + spu->regArea[r>>1] = val; // printf("SPU2: %04x to %08x\n", val, reg); @@ -93,30 +88,30 @@ EXPORT_GCC void CALLBACK SPU2write(mips_cpu_context *cpu, unsigned long reg, uns { //------------------------------------------------// r volume case 0: - SetVolumeL((unsigned char)ch,val); + SetVolumeL(spu, (unsigned char)ch,val); break; //------------------------------------------------// l volume case 2: - SetVolumeR((unsigned char)ch,val); + SetVolumeR(spu, (unsigned char)ch,val); break; //------------------------------------------------// pitch case 4: - SetPitch(ch,val); + SetPitch(spu, ch,val); break; //------------------------------------------------// level with pre-calcs case 6: { const unsigned long lval=val;unsigned long lx; //---------------------------------------------// - s_chan[ch].ADSRX.AttackModeExp=(lval&0x8000)?1:0; - s_chan[ch].ADSRX.AttackRate=(lval>>8) & 0x007f; - s_chan[ch].ADSRX.DecayRate=(lval>>4) & 0x000f; - s_chan[ch].ADSRX.SustainLevel=lval & 0x000f; + spu->s_chan[ch].ADSRX.AttackModeExp=(lval&0x8000)?1:0; + spu->s_chan[ch].ADSRX.AttackRate=(lval>>8) & 0x007f; + spu->s_chan[ch].ADSRX.DecayRate=(lval>>4) & 0x000f; + spu->s_chan[ch].ADSRX.SustainLevel=lval & 0x000f; //---------------------------------------------// - if(!iDebugMode) break; + if(!spu->iDebugMode) break; //---------------------------------------------// stuff below is only for debug mode - s_chan[ch].ADSR.AttackModeExp=(lval&0x8000)?1:0; //0x007f + spu->s_chan[ch].ADSR.AttackModeExp=(lval&0x8000)?1:0; //0x007f lx=(((lval>>8) & 0x007f)>>2); // attack time to run from 0 to 100% volume lx=min(31,lx); // no overflow on shift! @@ -127,9 +122,9 @@ EXPORT_GCC void CALLBACK SPU2write(mips_cpu_context *cpu, unsigned long reg, uns else lx=(lx/10000L)*ATTACK_MS; if(!lx) lx=1; } - s_chan[ch].ADSR.AttackTime=lx; + spu->s_chan[ch].ADSR.AttackTime=lx; - s_chan[ch].ADSR.SustainLevel= // our adsr vol runs from 0 to 1024, so scale the sustain level + spu->s_chan[ch].ADSR.SustainLevel= // our adsr vol runs from 0 to 1024, so scale the sustain level (1024*((lval) & 0x000f))/15; lx=(lval>>4) & 0x000f; // decay: @@ -138,8 +133,8 @@ EXPORT_GCC void CALLBACK SPU2write(mips_cpu_context *cpu, unsigned long reg, uns lx = ((1<<(lx))*DECAY_MS)/10000L; if(!lx) lx=1; } - s_chan[ch].ADSR.DecayTime = // so calc how long does it take to run from 100% to the wanted sus level - (lx*(1024-s_chan[ch].ADSR.SustainLevel))/1024; + spu->s_chan[ch].ADSR.DecayTime = // so calc how long does it take to run from 100% to the wanted sus level + (lx*(1024-spu->s_chan[ch].ADSR.SustainLevel))/1024; } break; //------------------------------------------------// adsr times with pre-calcs @@ -148,17 +143,17 @@ EXPORT_GCC void CALLBACK SPU2write(mips_cpu_context *cpu, unsigned long reg, uns const unsigned long lval=val;unsigned long lx; //----------------------------------------------// - s_chan[ch].ADSRX.SustainModeExp = (lval&0x8000)?1:0; - s_chan[ch].ADSRX.SustainIncrease= (lval&0x4000)?0:1; - s_chan[ch].ADSRX.SustainRate = (lval>>6) & 0x007f; - s_chan[ch].ADSRX.ReleaseModeExp = (lval&0x0020)?1:0; - s_chan[ch].ADSRX.ReleaseRate = lval & 0x001f; + spu->s_chan[ch].ADSRX.SustainModeExp = (lval&0x8000)?1:0; + spu->s_chan[ch].ADSRX.SustainIncrease= (lval&0x4000)?0:1; + spu->s_chan[ch].ADSRX.SustainRate = (lval>>6) & 0x007f; + spu->s_chan[ch].ADSRX.ReleaseModeExp = (lval&0x0020)?1:0; + spu->s_chan[ch].ADSRX.ReleaseRate = lval & 0x001f; //----------------------------------------------// - if(!iDebugMode) break; + if(!spu->iDebugMode) break; //----------------------------------------------// stuff below is only for debug mode - s_chan[ch].ADSR.SustainModeExp = (lval&0x8000)?1:0; - s_chan[ch].ADSR.ReleaseModeExp = (lval&0x0020)?1:0; + spu->s_chan[ch].ADSR.SustainModeExp = (lval&0x8000)?1:0; + spu->s_chan[ch].ADSR.ReleaseModeExp = (lval&0x0020)?1:0; lx=((((lval>>6) & 0x007f)>>2)); // sustain time... often very high lx=min(31,lx); // values are used to hold the volume @@ -169,10 +164,10 @@ EXPORT_GCC void CALLBACK SPU2write(mips_cpu_context *cpu, unsigned long reg, uns else lx=(lx/10000L)*SUSTAIN_MS; // should be enuff... if the stop doesn't if(!lx) lx=1; // come in this time span, I don't care :) } - s_chan[ch].ADSR.SustainTime = lx; + spu->s_chan[ch].ADSR.SustainTime = lx; lx=(lval & 0x001f); - s_chan[ch].ADSR.ReleaseVal =lx; + spu->s_chan[ch].ADSR.ReleaseVal =lx; if(lx) // release time from 100% to 0% { // note: the release time will be lx = (1<s_chan[ch].ADSR.ReleaseTime=lx; if(lval & 0x4000) // add/dec flag - s_chan[ch].ADSR.SustainModeDec=-1; - else s_chan[ch].ADSR.SustainModeDec=1; + spu->s_chan[ch].ADSR.SustainModeDec=-1; + else spu->s_chan[ch].ADSR.SustainModeDec=1; } break; //------------------------------------------------// } - iSpuAsyncWait=0; + spu->iSpuAsyncWait=0; return; } @@ -206,37 +201,37 @@ EXPORT_GCC void CALLBACK SPU2write(mips_cpu_context *cpu, unsigned long reg, uns { //------------------------------------------------// case 0x1C0: - s_chan[ch].iStartAdr=(((unsigned long)val&0xf)<<16)|(s_chan[ch].iStartAdr&0xFFFF); - s_chan[ch].pStart=spuMemC+(s_chan[ch].iStartAdr<<1); + spu->s_chan[ch].iStartAdr=(((unsigned long)val&0xf)<<16)|(spu->s_chan[ch].iStartAdr&0xFFFF); + spu->s_chan[ch].pStart=spu->spuMemC+(spu->s_chan[ch].iStartAdr<<1); break; case 0x1C2: - s_chan[ch].iStartAdr=(s_chan[ch].iStartAdr & 0xF0000) | (val & 0xFFFF); - s_chan[ch].pStart=spuMemC+(s_chan[ch].iStartAdr<<1); + spu->s_chan[ch].iStartAdr=(spu->s_chan[ch].iStartAdr & 0xF0000) | (val & 0xFFFF); + spu->s_chan[ch].pStart=spu->spuMemC+(spu->s_chan[ch].iStartAdr<<1); break; //------------------------------------------------// case 0x1C4: - s_chan[ch].iLoopAdr=(((unsigned long)val&0xf)<<16)|(s_chan[ch].iLoopAdr&0xFFFF); - s_chan[ch].pLoop=spuMemC+(s_chan[ch].iLoopAdr<<1); - s_chan[ch].bIgnoreLoop=1; + spu->s_chan[ch].iLoopAdr=(((unsigned long)val&0xf)<<16)|(spu->s_chan[ch].iLoopAdr&0xFFFF); + spu->s_chan[ch].pLoop=spu->spuMemC+(spu->s_chan[ch].iLoopAdr<<1); + spu->s_chan[ch].bIgnoreLoop=1; break; case 0x1C6: - s_chan[ch].iLoopAdr=(s_chan[ch].iLoopAdr & 0xF0000) | (val & 0xFFFF); - s_chan[ch].pLoop=spuMemC+(s_chan[ch].iLoopAdr<<1); - s_chan[ch].bIgnoreLoop=1; + spu->s_chan[ch].iLoopAdr=(spu->s_chan[ch].iLoopAdr & 0xF0000) | (val & 0xFFFF); + spu->s_chan[ch].pLoop=spu->spuMemC+(spu->s_chan[ch].iLoopAdr<<1); + spu->s_chan[ch].bIgnoreLoop=1; break; //------------------------------------------------// case 0x1C8: // unused... check if it gets written as well - s_chan[ch].iNextAdr=(((unsigned long)val&0xf)<<16)|(s_chan[ch].iNextAdr&0xFFFF); + spu->s_chan[ch].iNextAdr=(((unsigned long)val&0xf)<<16)|(spu->s_chan[ch].iNextAdr&0xFFFF); break; case 0x1CA: // unused... check if it gets written as well - s_chan[ch].iNextAdr=(s_chan[ch].iNextAdr & 0xF0000) | (val & 0xFFFF); + spu->s_chan[ch].iNextAdr=(spu->s_chan[ch].iNextAdr & 0xF0000) | (val & 0xFFFF); break; //------------------------------------------------// } - iSpuAsyncWait=0; + spu->iSpuAsyncWait=0; return; } @@ -245,541 +240,541 @@ EXPORT_GCC void CALLBACK SPU2write(mips_cpu_context *cpu, unsigned long reg, uns { //-------------------------------------------------// case PS2_C0_SPUaddr_Hi: - spuAddr2[0] = (((unsigned long)val&0xf)<<16)|(spuAddr2[0]&0xFFFF); + spu->spuAddr2[0] = (((unsigned long)val&0xf)<<16)|(spu->spuAddr2[0]&0xFFFF); break; //-------------------------------------------------// case PS2_C0_SPUaddr_Lo: - spuAddr2[0] = (spuAddr2[0] & 0xF0000) | (val & 0xFFFF); + spu->spuAddr2[0] = (spu->spuAddr2[0] & 0xF0000) | (val & 0xFFFF); break; //-------------------------------------------------// case PS2_C1_SPUaddr_Hi: - spuAddr2[1] = (((unsigned long)val&0xf)<<16)|(spuAddr2[1]&0xFFFF); + spu->spuAddr2[1] = (((unsigned long)val&0xf)<<16)|(spu->spuAddr2[1]&0xFFFF); break; //-------------------------------------------------// case PS2_C1_SPUaddr_Lo: - spuAddr2[1] = (spuAddr2[1] & 0xF0000) | (val & 0xFFFF); + spu->spuAddr2[1] = (spu->spuAddr2[1] & 0xF0000) | (val & 0xFFFF); break; //-------------------------------------------------// case PS2_C0_SPUdata: - spuMem[spuAddr2[0]] = val; - spuAddr2[0]++; - if(spuAddr2[0]>0xfffff) spuAddr2[0]=0; + spu->spuMem[spu->spuAddr2[0]] = val; + spu->spuAddr2[0]++; + if(spu->spuAddr2[0]>0xfffff) spu->spuAddr2[0]=0; break; //-------------------------------------------------// case PS2_C1_SPUdata: - spuMem[spuAddr2[1]] = val; - spuAddr2[1]++; - if(spuAddr2[1]>0xfffff) spuAddr2[1]=0; + spu->spuMem[spu->spuAddr2[1]] = val; + spu->spuAddr2[1]++; + if(spu->spuAddr2[1]>0xfffff) spu->spuAddr2[1]=0; break; //-------------------------------------------------// case PS2_C0_ATTR: - spuCtrl2[0]=val; + spu->spuCtrl2[0]=val; break; //-------------------------------------------------// case PS2_C1_ATTR: - spuCtrl2[1]=val; + spu->spuCtrl2[1]=val; break; //-------------------------------------------------// case PS2_C0_SPUstat: - spuStat2[0]=val; + spu->spuStat2[0]=val; break; //-------------------------------------------------// case PS2_C1_SPUstat: - spuStat2[1]=val; + spu->spuStat2[1]=val; break; //-------------------------------------------------// case PS2_C0_ReverbAddr_Hi: - spuRvbAddr2[0] = (((unsigned long)val&0xf)<<16)|(spuRvbAddr2[0]&0xFFFF); - SetReverbAddr(0); + spu->spuRvbAddr2[0] = (((unsigned long)val&0xf)<<16)|(spu->spuRvbAddr2[0]&0xFFFF); + SetReverbAddr(spu, 0); break; //-------------------------------------------------// case PS2_C0_ReverbAddr_Lo: - spuRvbAddr2[0] = (spuRvbAddr2[0] & 0xF0000) | (val & 0xFFFF); - SetReverbAddr(0); + spu->spuRvbAddr2[0] = (spu->spuRvbAddr2[0] & 0xF0000) | (val & 0xFFFF); + SetReverbAddr(spu, 0); break; //-------------------------------------------------// case PS2_C0_ReverbAEnd_Hi: - spuRvbAEnd2[0] = (((unsigned long)val&0xf)<<16)|(/*spuRvbAEnd2[0]&*/0xFFFF); - rvb[0].EndAddr=spuRvbAEnd2[0]; + spu->spuRvbAEnd2[0] = (((unsigned long)val&0xf)<<16)|(/*spu->spuRvbAEnd2[0]&*/0xFFFF); + spu->rvb[0].EndAddr=spu->spuRvbAEnd2[0]; break; //-------------------------------------------------// case PS2_C1_ReverbAEnd_Hi: - spuRvbAEnd2[1] = (((unsigned long)val&0xf)<<16)|(/*spuRvbAEnd2[1]&*/0xFFFF); - rvb[1].EndAddr=spuRvbAEnd2[1]; + spu->spuRvbAEnd2[1] = (((unsigned long)val&0xf)<<16)|(/*spu->spuRvbAEnd2[1]&*/0xFFFF); + spu->rvb[1].EndAddr=spu->spuRvbAEnd2[1]; break; //-------------------------------------------------// case PS2_C1_ReverbAddr_Hi: - spuRvbAddr2[1] = (((unsigned long)val&0xf)<<16)|(spuRvbAddr2[1]&0xFFFF); - SetReverbAddr(1); + spu->spuRvbAddr2[1] = (((unsigned long)val&0xf)<<16)|(spu->spuRvbAddr2[1]&0xFFFF); + SetReverbAddr(spu, 1); break; //-------------------------------------------------// case PS2_C1_ReverbAddr_Lo: - spuRvbAddr2[1] = (spuRvbAddr2[1] & 0xF0000) | (val & 0xFFFF); - SetReverbAddr(1); + spu->spuRvbAddr2[1] = (spu->spuRvbAddr2[1] & 0xF0000) | (val & 0xFFFF); + SetReverbAddr(spu, 1); break; //-------------------------------------------------// case PS2_C0_SPUirqAddr_Hi: - spuIrq2[0] = (((unsigned long)val&0xf)<<16)|(spuIrq2[0]&0xFFFF); - pSpuIrq[0]=spuMemC+(spuIrq2[0]<<1); + spu->spuIrq2[0] = (((unsigned long)val&0xf)<<16)|(spu->spuIrq2[0]&0xFFFF); + spu->pSpuIrq[0]=spu->spuMemC+(spu->spuIrq2[0]<<1); break; //-------------------------------------------------// case PS2_C0_SPUirqAddr_Lo: - spuIrq2[0] = (spuIrq2[0] & 0xF0000) | (val & 0xFFFF); - pSpuIrq[0]=spuMemC+(spuIrq2[0]<<1); + spu->spuIrq2[0] = (spu->spuIrq2[0] & 0xF0000) | (val & 0xFFFF); + spu->pSpuIrq[0]=spu->spuMemC+(spu->spuIrq2[0]<<1); break; //-------------------------------------------------// case PS2_C1_SPUirqAddr_Hi: - spuIrq2[1] = (((unsigned long)val&0xf)<<16)|(spuIrq2[1]&0xFFFF); - pSpuIrq[1]=spuMemC+(spuIrq2[1]<<1); + spu->spuIrq2[1] = (((unsigned long)val&0xf)<<16)|(spu->spuIrq2[1]&0xFFFF); + spu->pSpuIrq[1]=spu->spuMemC+(spu->spuIrq2[1]<<1); break; //-------------------------------------------------// case PS2_C1_SPUirqAddr_Lo: - spuIrq2[1] = (spuIrq2[1] & 0xF0000) | (val & 0xFFFF); - pSpuIrq[1]=spuMemC+(spuIrq2[1]<<1); + spu->spuIrq2[1] = (spu->spuIrq2[1] & 0xF0000) | (val & 0xFFFF); + spu->pSpuIrq[1]=spu->spuMemC+(spu->spuIrq2[1]<<1); break; //-------------------------------------------------// case PS2_C0_SPUrvolL: - rvb[0].VolLeft=val; + spu->rvb[0].VolLeft=val; break; //-------------------------------------------------// case PS2_C0_SPUrvolR: - rvb[0].VolRight=val; + spu->rvb[0].VolRight=val; break; //-------------------------------------------------// case PS2_C1_SPUrvolL: - rvb[1].VolLeft=val; + spu->rvb[1].VolLeft=val; break; //-------------------------------------------------// case PS2_C1_SPUrvolR: - rvb[1].VolRight=val; + spu->rvb[1].VolRight=val; break; //-------------------------------------------------// case PS2_C0_SPUon1: - SoundOn(0,16,val); + SoundOn(spu, 0,16,val); break; //-------------------------------------------------// case PS2_C0_SPUon2: - SoundOn(16,24,val); + SoundOn(spu, 16,24,val); break; //-------------------------------------------------// case PS2_C1_SPUon1: - SoundOn(24,40,val); + SoundOn(spu, 24,40,val); break; //-------------------------------------------------// case PS2_C1_SPUon2: - SoundOn(40,48,val); + SoundOn(spu, 40,48,val); break; //-------------------------------------------------// case PS2_C0_SPUoff1: - SoundOff(0,16,val); + SoundOff(spu, 0,16,val); break; //-------------------------------------------------// case PS2_C0_SPUoff2: - SoundOff(16,24,val); + SoundOff(spu, 16,24,val); break; //-------------------------------------------------// case PS2_C1_SPUoff1: - SoundOff(24,40,val); + SoundOff(spu, 24,40,val); break; //-------------------------------------------------// case PS2_C1_SPUoff2: - SoundOff(40,48,val); + SoundOff(spu, 40,48,val); break; //-------------------------------------------------// case PS2_C0_SPUend1: case PS2_C0_SPUend2: - if(val) dwEndChannel2[0]=0; + if(val) spu->dwEndChannel2[0]=0; break; //-------------------------------------------------// case PS2_C1_SPUend1: case PS2_C1_SPUend2: - if(val) dwEndChannel2[1]=0; + if(val) spu->dwEndChannel2[1]=0; break; //-------------------------------------------------// case PS2_C0_FMod1: - FModOn(0,16,val); + FModOn(spu, 0,16,val); break; //-------------------------------------------------// case PS2_C0_FMod2: - FModOn(16,24,val); + FModOn(spu, 16,24,val); break; //-------------------------------------------------// case PS2_C1_FMod1: - FModOn(24,40,val); + FModOn(spu, 24,40,val); break; //-------------------------------------------------// case PS2_C1_FMod2: - FModOn(40,48,val); + FModOn(spu, 40,48,val); break; //-------------------------------------------------// case PS2_C0_Noise1: - NoiseOn(0,16,val); + NoiseOn(spu, 0,16,val); break; //-------------------------------------------------// case PS2_C0_Noise2: - NoiseOn(16,24,val); + NoiseOn(spu, 16,24,val); break; //-------------------------------------------------// case PS2_C1_Noise1: - NoiseOn(24,40,val); + NoiseOn(spu, 24,40,val); break; //-------------------------------------------------// case PS2_C1_Noise2: - NoiseOn(40,48,val); + NoiseOn(spu, 40,48,val); break; //-------------------------------------------------// case PS2_C0_DryL1: - VolumeOn(0,16,val,0); + VolumeOn(spu, 0,16,val,0); break; //-------------------------------------------------// case PS2_C0_DryL2: - VolumeOn(16,24,val,0); + VolumeOn(spu, 16,24,val,0); break; //-------------------------------------------------// case PS2_C1_DryL1: - VolumeOn(24,40,val,0); + VolumeOn(spu, 24,40,val,0); break; //-------------------------------------------------// case PS2_C1_DryL2: - VolumeOn(40,48,val,0); + VolumeOn(spu, 40,48,val,0); break; //-------------------------------------------------// case PS2_C0_DryR1: - VolumeOn(0,16,val,1); + VolumeOn(spu, 0,16,val,1); break; //-------------------------------------------------// case PS2_C0_DryR2: - VolumeOn(16,24,val,1); + VolumeOn(spu, 16,24,val,1); break; //-------------------------------------------------// case PS2_C1_DryR1: - VolumeOn(24,40,val,1); + VolumeOn(spu, 24,40,val,1); break; //-------------------------------------------------// case PS2_C1_DryR2: - VolumeOn(40,48,val,1); + VolumeOn(spu, 40,48,val,1); break; //-------------------------------------------------// case PS2_C0_RVBon1_L: - ReverbOn(0,16,val,0); + ReverbOn(spu, 0,16,val,0); break; //-------------------------------------------------// case PS2_C0_RVBon2_L: - ReverbOn(16,24,val,0); + ReverbOn(spu, 16,24,val,0); break; //-------------------------------------------------// case PS2_C1_RVBon1_L: - ReverbOn(24,40,val,0); + ReverbOn(spu, 24,40,val,0); break; //-------------------------------------------------// case PS2_C1_RVBon2_L: - ReverbOn(40,48,val,0); + ReverbOn(spu, 40,48,val,0); break; //-------------------------------------------------// case PS2_C0_RVBon1_R: - ReverbOn(0,16,val,1); + ReverbOn(spu, 0,16,val,1); break; //-------------------------------------------------// case PS2_C0_RVBon2_R: - ReverbOn(16,24,val,1); + ReverbOn(spu, 16,24,val,1); break; //-------------------------------------------------// case PS2_C1_RVBon1_R: - ReverbOn(24,40,val,1); + ReverbOn(spu, 24,40,val,1); break; //-------------------------------------------------// case PS2_C1_RVBon2_R: - ReverbOn(40,48,val,1); + ReverbOn(spu, 40,48,val,1); break; //-------------------------------------------------// case PS2_C0_Reverb+0: - rvb[0].FB_SRC_A=(((unsigned long)val&0xf)<<16)|(rvb[0].FB_SRC_A&0xFFFF); + spu->rvb[0].FB_SRC_A=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].FB_SRC_A&0xFFFF); break; case PS2_C0_Reverb+2: - rvb[0].FB_SRC_A=(rvb[0].FB_SRC_A & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].FB_SRC_A=(spu->rvb[0].FB_SRC_A & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+4: - rvb[0].FB_SRC_B=(((unsigned long)val&0xf)<<16)|(rvb[0].FB_SRC_B&0xFFFF); + spu->rvb[0].FB_SRC_B=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].FB_SRC_B&0xFFFF); break; case PS2_C0_Reverb+6: - rvb[0].FB_SRC_B=(rvb[0].FB_SRC_B & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].FB_SRC_B=(spu->rvb[0].FB_SRC_B & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+8: - rvb[0].IIR_DEST_A0=(((unsigned long)val&0xf)<<16)|(rvb[0].IIR_DEST_A0&0xFFFF); + spu->rvb[0].IIR_DEST_A0=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].IIR_DEST_A0&0xFFFF); break; case PS2_C0_Reverb+10: - rvb[0].IIR_DEST_A0=(rvb[0].IIR_DEST_A0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].IIR_DEST_A0=(spu->rvb[0].IIR_DEST_A0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+12: - rvb[0].IIR_DEST_A1=(((unsigned long)val&0xf)<<16)|(rvb[0].IIR_DEST_A1&0xFFFF); + spu->rvb[0].IIR_DEST_A1=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].IIR_DEST_A1&0xFFFF); break; case PS2_C0_Reverb+14: - rvb[0].IIR_DEST_A1=(rvb[0].IIR_DEST_A1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].IIR_DEST_A1=(spu->rvb[0].IIR_DEST_A1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+16: - rvb[0].ACC_SRC_A0=(((unsigned long)val&0xf)<<16)|(rvb[0].ACC_SRC_A0&0xFFFF); + spu->rvb[0].ACC_SRC_A0=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].ACC_SRC_A0&0xFFFF); break; case PS2_C0_Reverb+18: - rvb[0].ACC_SRC_A0=(rvb[0].ACC_SRC_A0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].ACC_SRC_A0=(spu->rvb[0].ACC_SRC_A0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+20: - rvb[0].ACC_SRC_A1=(((unsigned long)val&0xf)<<16)|(rvb[0].ACC_SRC_A1&0xFFFF); + spu->rvb[0].ACC_SRC_A1=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].ACC_SRC_A1&0xFFFF); break; case PS2_C0_Reverb+22: - rvb[0].ACC_SRC_A1=(rvb[0].ACC_SRC_A1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].ACC_SRC_A1=(spu->rvb[0].ACC_SRC_A1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+24: - rvb[0].ACC_SRC_B0=(((unsigned long)val&0xf)<<16)|(rvb[0].ACC_SRC_B0&0xFFFF); + spu->rvb[0].ACC_SRC_B0=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].ACC_SRC_B0&0xFFFF); break; case PS2_C0_Reverb+26: - rvb[0].ACC_SRC_B0=(rvb[0].ACC_SRC_B0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].ACC_SRC_B0=(spu->rvb[0].ACC_SRC_B0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+28: - rvb[0].ACC_SRC_B1=(((unsigned long)val&0xf)<<16)|(rvb[0].ACC_SRC_B1&0xFFFF); + spu->rvb[0].ACC_SRC_B1=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].ACC_SRC_B1&0xFFFF); break; case PS2_C0_Reverb+30: - rvb[0].ACC_SRC_B1=(rvb[0].ACC_SRC_B1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].ACC_SRC_B1=(spu->rvb[0].ACC_SRC_B1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+32: - rvb[0].IIR_SRC_A0=(((unsigned long)val&0xf)<<16)|(rvb[0].IIR_SRC_A0&0xFFFF); + spu->rvb[0].IIR_SRC_A0=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].IIR_SRC_A0&0xFFFF); break; case PS2_C0_Reverb+34: - rvb[0].IIR_SRC_A0=(rvb[0].IIR_SRC_A0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].IIR_SRC_A0=(spu->rvb[0].IIR_SRC_A0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+36: - rvb[0].IIR_SRC_A1=(((unsigned long)val&0xf)<<16)|(rvb[0].IIR_SRC_A1&0xFFFF); + spu->rvb[0].IIR_SRC_A1=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].IIR_SRC_A1&0xFFFF); break; case PS2_C0_Reverb+38: - rvb[0].IIR_SRC_A1=(rvb[0].IIR_SRC_A1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].IIR_SRC_A1=(spu->rvb[0].IIR_SRC_A1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+40: - rvb[0].IIR_DEST_B0=(((unsigned long)val&0xf)<<16)|(rvb[0].IIR_DEST_B0&0xFFFF); + spu->rvb[0].IIR_DEST_B0=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].IIR_DEST_B0&0xFFFF); break; case PS2_C0_Reverb+42: - rvb[0].IIR_DEST_B0=(rvb[0].IIR_DEST_B0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].IIR_DEST_B0=(spu->rvb[0].IIR_DEST_B0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+44: - rvb[0].IIR_DEST_B1=(((unsigned long)val&0xf)<<16)|(rvb[0].IIR_DEST_B1&0xFFFF); + spu->rvb[0].IIR_DEST_B1=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].IIR_DEST_B1&0xFFFF); break; case PS2_C0_Reverb+46: - rvb[0].IIR_DEST_B1=(rvb[0].IIR_DEST_B1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].IIR_DEST_B1=(spu->rvb[0].IIR_DEST_B1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+48: - rvb[0].ACC_SRC_C0=(((unsigned long)val&0xf)<<16)|(rvb[0].ACC_SRC_C0&0xFFFF); + spu->rvb[0].ACC_SRC_C0=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].ACC_SRC_C0&0xFFFF); break; case PS2_C0_Reverb+50: - rvb[0].ACC_SRC_C0=(rvb[0].ACC_SRC_C0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].ACC_SRC_C0=(spu->rvb[0].ACC_SRC_C0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+52: - rvb[0].ACC_SRC_C1=(((unsigned long)val&0xf)<<16)|(rvb[0].ACC_SRC_C1&0xFFFF); + spu->rvb[0].ACC_SRC_C1=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].ACC_SRC_C1&0xFFFF); break; case PS2_C0_Reverb+54: - rvb[0].ACC_SRC_C1=(rvb[0].ACC_SRC_C1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].ACC_SRC_C1=(spu->rvb[0].ACC_SRC_C1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+56: - rvb[0].ACC_SRC_D0=(((unsigned long)val&0xf)<<16)|(rvb[0].ACC_SRC_D0&0xFFFF); + spu->rvb[0].ACC_SRC_D0=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].ACC_SRC_D0&0xFFFF); break; case PS2_C0_Reverb+58: - rvb[0].ACC_SRC_D0=(rvb[0].ACC_SRC_D0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].ACC_SRC_D0=(spu->rvb[0].ACC_SRC_D0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+60: - rvb[0].ACC_SRC_D1=(((unsigned long)val&0xf)<<16)|(rvb[0].ACC_SRC_D1&0xFFFF); + spu->rvb[0].ACC_SRC_D1=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].ACC_SRC_D1&0xFFFF); break; case PS2_C0_Reverb+62: - rvb[0].ACC_SRC_D1=(rvb[0].ACC_SRC_D1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].ACC_SRC_D1=(spu->rvb[0].ACC_SRC_D1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+64: - rvb[0].IIR_SRC_B1=(((unsigned long)val&0xf)<<16)|(rvb[0].IIR_SRC_B1&0xFFFF); + spu->rvb[0].IIR_SRC_B1=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].IIR_SRC_B1&0xFFFF); break; case PS2_C0_Reverb+66: - rvb[0].IIR_SRC_B1=(rvb[0].IIR_SRC_B1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].IIR_SRC_B1=(spu->rvb[0].IIR_SRC_B1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+68: - rvb[0].IIR_SRC_B0=(((unsigned long)val&0xf)<<16)|(rvb[0].IIR_SRC_B0&0xFFFF); + spu->rvb[0].IIR_SRC_B0=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].IIR_SRC_B0&0xFFFF); break; case PS2_C0_Reverb+70: - rvb[0].IIR_SRC_B0=(rvb[0].IIR_SRC_B0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].IIR_SRC_B0=(spu->rvb[0].IIR_SRC_B0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+72: - rvb[0].MIX_DEST_A0=(((unsigned long)val&0xf)<<16)|(rvb[0].MIX_DEST_A0&0xFFFF); + spu->rvb[0].MIX_DEST_A0=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].MIX_DEST_A0&0xFFFF); break; case PS2_C0_Reverb+74: - rvb[0].MIX_DEST_A0=(rvb[0].MIX_DEST_A0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].MIX_DEST_A0=(spu->rvb[0].MIX_DEST_A0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+76: - rvb[0].MIX_DEST_A1=(((unsigned long)val&0xf)<<16)|(rvb[0].MIX_DEST_A1&0xFFFF); + spu->rvb[0].MIX_DEST_A1=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].MIX_DEST_A1&0xFFFF); break; case PS2_C0_Reverb+78: - rvb[0].MIX_DEST_A1=(rvb[0].MIX_DEST_A1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].MIX_DEST_A1=(spu->rvb[0].MIX_DEST_A1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+80: - rvb[0].MIX_DEST_B0=(((unsigned long)val&0xf)<<16)|(rvb[0].MIX_DEST_B0&0xFFFF); + spu->rvb[0].MIX_DEST_B0=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].MIX_DEST_B0&0xFFFF); break; case PS2_C0_Reverb+82: - rvb[0].MIX_DEST_B0=(rvb[0].MIX_DEST_B0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[0].MIX_DEST_B0=(spu->rvb[0].MIX_DEST_B0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C0_Reverb+84: - rvb[0].MIX_DEST_B1=(((unsigned long)val&0xf)<<16)|(rvb[0].MIX_DEST_B1&0xFFFF); + spu->rvb[0].MIX_DEST_B1=(((unsigned long)val&0xf)<<16)|(spu->rvb[0].MIX_DEST_B1&0xFFFF); break; case PS2_C0_Reverb+86: - rvb[0].MIX_DEST_B1=(rvb[0].MIX_DEST_B1 & 0xF0000) | ((val) & 0xFFFF); - break; - case PS2_C0_ReverbX+0: rvb[0].IIR_ALPHA=(short)val; break; - case PS2_C0_ReverbX+2: rvb[0].ACC_COEF_A=(short)val; break; - case PS2_C0_ReverbX+4: rvb[0].ACC_COEF_B=(short)val; break; - case PS2_C0_ReverbX+6: rvb[0].ACC_COEF_C=(short)val; break; - case PS2_C0_ReverbX+8: rvb[0].ACC_COEF_D=(short)val; break; - case PS2_C0_ReverbX+10: rvb[0].IIR_COEF=(short)val; break; - case PS2_C0_ReverbX+12: rvb[0].FB_ALPHA=(short)val; break; - case PS2_C0_ReverbX+14: rvb[0].FB_X=(short)val; break; - case PS2_C0_ReverbX+16: rvb[0].IN_COEF_L=(short)val; break; - case PS2_C0_ReverbX+18: rvb[0].IN_COEF_R=(short)val; break; + spu->rvb[0].MIX_DEST_B1=(spu->rvb[0].MIX_DEST_B1 & 0xF0000) | ((val) & 0xFFFF); + break; + case PS2_C0_ReverbX+0: spu->rvb[0].IIR_ALPHA=(short)val; break; + case PS2_C0_ReverbX+2: spu->rvb[0].ACC_COEF_A=(short)val; break; + case PS2_C0_ReverbX+4: spu->rvb[0].ACC_COEF_B=(short)val; break; + case PS2_C0_ReverbX+6: spu->rvb[0].ACC_COEF_C=(short)val; break; + case PS2_C0_ReverbX+8: spu->rvb[0].ACC_COEF_D=(short)val; break; + case PS2_C0_ReverbX+10: spu->rvb[0].IIR_COEF=(short)val; break; + case PS2_C0_ReverbX+12: spu->rvb[0].FB_ALPHA=(short)val; break; + case PS2_C0_ReverbX+14: spu->rvb[0].FB_X=(short)val; break; + case PS2_C0_ReverbX+16: spu->rvb[0].IN_COEF_L=(short)val; break; + case PS2_C0_ReverbX+18: spu->rvb[0].IN_COEF_R=(short)val; break; //-------------------------------------------------// case PS2_C1_Reverb+0: - rvb[1].FB_SRC_A=(((unsigned long)val&0xf)<<16)|(rvb[1].FB_SRC_A&0xFFFF); + spu->rvb[1].FB_SRC_A=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].FB_SRC_A&0xFFFF); break; case PS2_C1_Reverb+2: - rvb[1].FB_SRC_A=(rvb[1].FB_SRC_A & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].FB_SRC_A=(spu->rvb[1].FB_SRC_A & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+4: - rvb[1].FB_SRC_B=(((unsigned long)val&0xf)<<16)|(rvb[1].FB_SRC_B&0xFFFF); + spu->rvb[1].FB_SRC_B=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].FB_SRC_B&0xFFFF); break; case PS2_C1_Reverb+6: - rvb[1].FB_SRC_B=(rvb[1].FB_SRC_B & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].FB_SRC_B=(spu->rvb[1].FB_SRC_B & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+8: - rvb[1].IIR_DEST_A0=(((unsigned long)val&0xf)<<16)|(rvb[1].IIR_DEST_A0&0xFFFF); + spu->rvb[1].IIR_DEST_A0=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].IIR_DEST_A0&0xFFFF); break; case PS2_C1_Reverb+10: - rvb[1].IIR_DEST_A0=(rvb[1].IIR_DEST_A0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].IIR_DEST_A0=(spu->rvb[1].IIR_DEST_A0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+12: - rvb[1].IIR_DEST_A1=(((unsigned long)val&0xf)<<16)|(rvb[1].IIR_DEST_A1&0xFFFF); + spu->rvb[1].IIR_DEST_A1=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].IIR_DEST_A1&0xFFFF); break; case PS2_C1_Reverb+14: - rvb[1].IIR_DEST_A1=(rvb[1].IIR_DEST_A1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].IIR_DEST_A1=(spu->rvb[1].IIR_DEST_A1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+16: - rvb[1].ACC_SRC_A0=(((unsigned long)val&0xf)<<16)|(rvb[1].ACC_SRC_A0&0xFFFF); + spu->rvb[1].ACC_SRC_A0=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].ACC_SRC_A0&0xFFFF); break; case PS2_C1_Reverb+18: - rvb[1].ACC_SRC_A0=(rvb[1].ACC_SRC_A0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].ACC_SRC_A0=(spu->rvb[1].ACC_SRC_A0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+20: - rvb[1].ACC_SRC_A1=(((unsigned long)val&0xf)<<16)|(rvb[1].ACC_SRC_A1&0xFFFF); + spu->rvb[1].ACC_SRC_A1=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].ACC_SRC_A1&0xFFFF); break; case PS2_C1_Reverb+22: - rvb[1].ACC_SRC_A1=(rvb[1].ACC_SRC_A1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].ACC_SRC_A1=(spu->rvb[1].ACC_SRC_A1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+24: - rvb[1].ACC_SRC_B0=(((unsigned long)val&0xf)<<16)|(rvb[1].ACC_SRC_B0&0xFFFF); + spu->rvb[1].ACC_SRC_B0=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].ACC_SRC_B0&0xFFFF); break; case PS2_C1_Reverb+26: - rvb[1].ACC_SRC_B0=(rvb[1].ACC_SRC_B0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].ACC_SRC_B0=(spu->rvb[1].ACC_SRC_B0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+28: - rvb[1].ACC_SRC_B1=(((unsigned long)val&0xf)<<16)|(rvb[1].ACC_SRC_B1&0xFFFF); + spu->rvb[1].ACC_SRC_B1=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].ACC_SRC_B1&0xFFFF); break; case PS2_C1_Reverb+30: - rvb[1].ACC_SRC_B1=(rvb[1].ACC_SRC_B1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].ACC_SRC_B1=(spu->rvb[1].ACC_SRC_B1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+32: - rvb[1].IIR_SRC_A0=(((unsigned long)val&0xf)<<16)|(rvb[1].IIR_SRC_A0&0xFFFF); + spu->rvb[1].IIR_SRC_A0=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].IIR_SRC_A0&0xFFFF); break; case PS2_C1_Reverb+34: - rvb[1].IIR_SRC_A0=(rvb[1].IIR_SRC_A0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].IIR_SRC_A0=(spu->rvb[1].IIR_SRC_A0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+36: - rvb[1].IIR_SRC_A1=(((unsigned long)val&0xf)<<16)|(rvb[1].IIR_SRC_A1&0xFFFF); + spu->rvb[1].IIR_SRC_A1=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].IIR_SRC_A1&0xFFFF); break; case PS2_C1_Reverb+38: - rvb[1].IIR_SRC_A1=(rvb[1].IIR_SRC_A1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].IIR_SRC_A1=(spu->rvb[1].IIR_SRC_A1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+40: - rvb[1].IIR_DEST_B0=(((unsigned long)val&0xf)<<16)|(rvb[1].IIR_DEST_B0&0xFFFF); + spu->rvb[1].IIR_DEST_B0=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].IIR_DEST_B0&0xFFFF); break; case PS2_C1_Reverb+42: - rvb[1].IIR_DEST_B0=(rvb[1].IIR_DEST_B0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].IIR_DEST_B0=(spu->rvb[1].IIR_DEST_B0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+44: - rvb[1].IIR_DEST_B1=(((unsigned long)val&0xf)<<16)|(rvb[1].IIR_DEST_B1&0xFFFF); + spu->rvb[1].IIR_DEST_B1=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].IIR_DEST_B1&0xFFFF); break; case PS2_C1_Reverb+46: - rvb[1].IIR_DEST_B1=(rvb[1].IIR_DEST_B1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].IIR_DEST_B1=(spu->rvb[1].IIR_DEST_B1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+48: - rvb[1].ACC_SRC_C0=(((unsigned long)val&0xf)<<16)|(rvb[1].ACC_SRC_C0&0xFFFF); + spu->rvb[1].ACC_SRC_C0=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].ACC_SRC_C0&0xFFFF); break; case PS2_C1_Reverb+50: - rvb[1].ACC_SRC_C0=(rvb[1].ACC_SRC_C0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].ACC_SRC_C0=(spu->rvb[1].ACC_SRC_C0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+52: - rvb[1].ACC_SRC_C1=(((unsigned long)val&0xf)<<16)|(rvb[1].ACC_SRC_C1&0xFFFF); + spu->rvb[1].ACC_SRC_C1=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].ACC_SRC_C1&0xFFFF); break; case PS2_C1_Reverb+54: - rvb[1].ACC_SRC_C1=(rvb[1].ACC_SRC_C1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].ACC_SRC_C1=(spu->rvb[1].ACC_SRC_C1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+56: - rvb[1].ACC_SRC_D0=(((unsigned long)val&0xf)<<16)|(rvb[1].ACC_SRC_D0&0xFFFF); + spu->rvb[1].ACC_SRC_D0=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].ACC_SRC_D0&0xFFFF); break; case PS2_C1_Reverb+58: - rvb[1].ACC_SRC_D0=(rvb[1].ACC_SRC_D0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].ACC_SRC_D0=(spu->rvb[1].ACC_SRC_D0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+60: - rvb[1].ACC_SRC_D1=(((unsigned long)val&0xf)<<16)|(rvb[1].ACC_SRC_D1&0xFFFF); + spu->rvb[1].ACC_SRC_D1=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].ACC_SRC_D1&0xFFFF); break; case PS2_C1_Reverb+62: - rvb[1].ACC_SRC_D1=(rvb[1].ACC_SRC_D1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].ACC_SRC_D1=(spu->rvb[1].ACC_SRC_D1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+64: - rvb[1].IIR_SRC_B1=(((unsigned long)val&0xf)<<16)|(rvb[1].IIR_SRC_B1&0xFFFF); + spu->rvb[1].IIR_SRC_B1=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].IIR_SRC_B1&0xFFFF); break; case PS2_C1_Reverb+66: - rvb[1].IIR_SRC_B1=(rvb[1].IIR_SRC_B1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].IIR_SRC_B1=(spu->rvb[1].IIR_SRC_B1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+68: - rvb[1].IIR_SRC_B0=(((unsigned long)val&0xf)<<16)|(rvb[1].IIR_SRC_B0&0xFFFF); + spu->rvb[1].IIR_SRC_B0=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].IIR_SRC_B0&0xFFFF); break; case PS2_C1_Reverb+70: - rvb[1].IIR_SRC_B0=(rvb[1].IIR_SRC_B0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].IIR_SRC_B0=(spu->rvb[1].IIR_SRC_B0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+72: - rvb[1].MIX_DEST_A0=(((unsigned long)val&0xf)<<16)|(rvb[1].MIX_DEST_A0&0xFFFF); + spu->rvb[1].MIX_DEST_A0=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].MIX_DEST_A0&0xFFFF); break; case PS2_C1_Reverb+74: - rvb[1].MIX_DEST_A0=(rvb[1].MIX_DEST_A0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].MIX_DEST_A0=(spu->rvb[1].MIX_DEST_A0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+76: - rvb[1].MIX_DEST_A1=(((unsigned long)val&0xf)<<16)|(rvb[1].MIX_DEST_A1&0xFFFF); + spu->rvb[1].MIX_DEST_A1=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].MIX_DEST_A1&0xFFFF); break; case PS2_C1_Reverb+78: - rvb[1].MIX_DEST_A1=(rvb[1].MIX_DEST_A1 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].MIX_DEST_A1=(spu->rvb[1].MIX_DEST_A1 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+80: - rvb[1].MIX_DEST_B0=(((unsigned long)val&0xf)<<16)|(rvb[1].MIX_DEST_B0&0xFFFF); + spu->rvb[1].MIX_DEST_B0=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].MIX_DEST_B0&0xFFFF); break; case PS2_C1_Reverb+82: - rvb[1].MIX_DEST_B0=(rvb[1].MIX_DEST_B0 & 0xF0000) | ((val) & 0xFFFF); + spu->rvb[1].MIX_DEST_B0=(spu->rvb[1].MIX_DEST_B0 & 0xF0000) | ((val) & 0xFFFF); break; case PS2_C1_Reverb+84: - rvb[1].MIX_DEST_B1=(((unsigned long)val&0xf)<<16)|(rvb[1].MIX_DEST_B1&0xFFFF); + spu->rvb[1].MIX_DEST_B1=(((unsigned long)val&0xf)<<16)|(spu->rvb[1].MIX_DEST_B1&0xFFFF); break; case PS2_C1_Reverb+86: - rvb[1].MIX_DEST_B1=(rvb[1].MIX_DEST_B1 & 0xF0000) | ((val) & 0xFFFF); - break; - case PS2_C1_ReverbX+0: rvb[1].IIR_ALPHA=(short)val; break; - case PS2_C1_ReverbX+2: rvb[1].ACC_COEF_A=(short)val; break; - case PS2_C1_ReverbX+4: rvb[1].ACC_COEF_B=(short)val; break; - case PS2_C1_ReverbX+6: rvb[1].ACC_COEF_C=(short)val; break; - case PS2_C1_ReverbX+8: rvb[1].ACC_COEF_D=(short)val; break; - case PS2_C1_ReverbX+10: rvb[1].IIR_COEF=(short)val; break; - case PS2_C1_ReverbX+12: rvb[1].FB_ALPHA=(short)val; break; - case PS2_C1_ReverbX+14: rvb[1].FB_X=(short)val; break; - case PS2_C1_ReverbX+16: rvb[1].IN_COEF_L=(short)val; break; - case PS2_C1_ReverbX+18: rvb[1].IN_COEF_R=(short)val; break; + spu->rvb[1].MIX_DEST_B1=(spu->rvb[1].MIX_DEST_B1 & 0xF0000) | ((val) & 0xFFFF); + break; + case PS2_C1_ReverbX+0: spu->rvb[1].IIR_ALPHA=(short)val; break; + case PS2_C1_ReverbX+2: spu->rvb[1].ACC_COEF_A=(short)val; break; + case PS2_C1_ReverbX+4: spu->rvb[1].ACC_COEF_B=(short)val; break; + case PS2_C1_ReverbX+6: spu->rvb[1].ACC_COEF_C=(short)val; break; + case PS2_C1_ReverbX+8: spu->rvb[1].ACC_COEF_D=(short)val; break; + case PS2_C1_ReverbX+10: spu->rvb[1].IIR_COEF=(short)val; break; + case PS2_C1_ReverbX+12: spu->rvb[1].FB_ALPHA=(short)val; break; + case PS2_C1_ReverbX+14: spu->rvb[1].FB_X=(short)val; break; + case PS2_C1_ReverbX+16: spu->rvb[1].IN_COEF_L=(short)val; break; + case PS2_C1_ReverbX+18: spu->rvb[1].IN_COEF_R=(short)val; break; } - iSpuAsyncWait=0; + spu->iSpuAsyncWait=0; } @@ -789,13 +784,14 @@ EXPORT_GCC void CALLBACK SPU2write(mips_cpu_context *cpu, unsigned long reg, uns EXPORT_GCC unsigned short CALLBACK SPU2read(mips_cpu_context *cpu, unsigned long reg) { + spu2_state_t *spu = cpu->spu2; long r=reg&0xffff; #ifdef _WINDOWS // if(iDebugMode==1) logprintf("R_REG %X\r\n",reg&0xFFFF); #endif - iSpuAsyncWait=0; + spu->iSpuAsyncWait=0; if((r>=0x0000 && r<0x0180)||(r>=0x0400 && r<0x0580)) // some channel info? { @@ -806,11 +802,11 @@ EXPORT_GCC unsigned short CALLBACK SPU2read(mips_cpu_context *cpu, unsigned long { int ch=(r>>4)&0x1f; if(r>=0x400) ch+=24; - if(s_chan[ch].bNew) return 1; // we are started, but not processed? return 1 - if(s_chan[ch].ADSRX.lVolume && // same here... we haven't decoded one sample yet, so no envelope yet. return 1 as well - !s_chan[ch].ADSRX.EnvelopeVol) + if(spu->s_chan[ch].bNew) return 1; // we are started, but not processed? return 1 + if(spu->s_chan[ch].ADSRX.lVolume && // same here... we haven't decoded one sample yet, so no envelope yet. return 1 as well + !spu->s_chan[ch].ADSRX.EnvelopeVol) return 1; - return (unsigned short)(s_chan[ch].ADSRX.EnvelopeVol>>16); + return (unsigned short)(spu->s_chan[ch].ADSRX.EnvelopeVol>>16); }break; } } @@ -827,17 +823,17 @@ EXPORT_GCC unsigned short CALLBACK SPU2read(mips_cpu_context *cpu, unsigned long { //------------------------------------------------// case 0x1C4: - return (((s_chan[ch].pLoop-spuMemC)>>17)&0xF); + return (((spu->s_chan[ch].pLoop-spu->spuMemC)>>17)&0xF); break; case 0x1C6: - return (((s_chan[ch].pLoop-spuMemC)>>1)&0xFFFF); + return (((spu->s_chan[ch].pLoop-spu->spuMemC)>>1)&0xFFFF); break; //------------------------------------------------// case 0x1C8: - return (((s_chan[ch].pCurr-spuMemC)>>17)&0xF); + return (((spu->s_chan[ch].pCurr-spu->spuMemC)>>17)&0xF); break; case 0x1CA: - return (((s_chan[ch].pCurr-spuMemC)>>1)&0xFFFF); + return (((spu->s_chan[ch].pCurr-spu->spuMemC)>>1)&0xFFFF); break; //------------------------------------------------// } @@ -847,68 +843,69 @@ EXPORT_GCC unsigned short CALLBACK SPU2read(mips_cpu_context *cpu, unsigned long { //--------------------------------------------------// case PS2_C0_SPUend1: - return (unsigned short)((dwEndChannel2[0]&0xFFFF)); + return (unsigned short)((spu->dwEndChannel2[0]&0xFFFF)); case PS2_C0_SPUend2: - return (unsigned short)((dwEndChannel2[0]>>16)); + return (unsigned short)((spu->dwEndChannel2[0]>>16)); //--------------------------------------------------// case PS2_C1_SPUend1: - return (unsigned short)((dwEndChannel2[1]&0xFFFF)); + return (unsigned short)((spu->dwEndChannel2[1]&0xFFFF)); case PS2_C1_SPUend2: - return (unsigned short)((dwEndChannel2[1]>>16)); + return (unsigned short)((spu->dwEndChannel2[1]>>16)); //--------------------------------------------------// case PS2_C0_ATTR: - return spuCtrl2[0]; + return spu->spuCtrl2[0]; break; //--------------------------------------------------// case PS2_C1_ATTR: - return spuCtrl2[1]; + return spu->spuCtrl2[1]; break; //--------------------------------------------------// case PS2_C0_SPUstat: - return spuStat2[0]; + return spu->spuStat2[0]; break; //--------------------------------------------------// case PS2_C1_SPUstat: - return spuStat2[1]; + return spu->spuStat2[1]; break; //--------------------------------------------------// case PS2_C0_SPUdata: { - unsigned short s=spuMem[spuAddr2[0]]; - spuAddr2[0]++; - if(spuAddr2[0]>0xfffff) spuAddr2[0]=0; + unsigned short s=spu->spuMem[spu->spuAddr2[0]]; + spu->spuAddr2[0]++; + if(spu->spuAddr2[0]>0xfffff) spu->spuAddr2[0]=0; return s; } //--------------------------------------------------// case PS2_C1_SPUdata: { - unsigned short s=spuMem[spuAddr2[1]]; - spuAddr2[1]++; - if(spuAddr2[1]>0xfffff) spuAddr2[1]=0; + unsigned short s=spu->spuMem[spu->spuAddr2[1]]; + spu->spuAddr2[1]++; + if(spu->spuAddr2[1]>0xfffff) spu->spuAddr2[1]=0; return s; } //--------------------------------------------------// case PS2_C0_SPUaddr_Hi: - return (unsigned short)((spuAddr2[0]>>16)&0xF); + return (unsigned short)((spu->spuAddr2[0]>>16)&0xF); break; case PS2_C0_SPUaddr_Lo: - return (unsigned short)((spuAddr2[0]&0xFFFF)); + return (unsigned short)((spu->spuAddr2[0]&0xFFFF)); break; //--------------------------------------------------// case PS2_C1_SPUaddr_Hi: - return (unsigned short)((spuAddr2[1]>>16)&0xF); + return (unsigned short)((spu->spuAddr2[1]>>16)&0xF); break; case PS2_C1_SPUaddr_Lo: - return (unsigned short)((spuAddr2[1]&0xFFFF)); + return (unsigned short)((spu->spuAddr2[1]&0xFFFF)); break; //--------------------------------------------------// } - return regArea[r>>1]; + return spu->regArea[r>>1]; } EXPORT_GCC void CALLBACK SPU2writePS1Port(mips_cpu_context *cpu, unsigned long reg, unsigned short val) { + spu2_state_t *spu = cpu->spu2; const u32 r=reg&0xfff; if(r>=0xc00 && r<0xd80) // channel info @@ -921,13 +918,13 @@ EXPORT_GCC void CALLBACK SPU2writePS1Port(mips_cpu_context *cpu, unsigned long r { //-------------------------------------------------// case H_SPUaddr: - spuAddr2[0] = (u32) val<<2; + spu->spuAddr2[0] = (u32) val<<2; break; //-------------------------------------------------// case H_SPUdata: - spuMem[spuAddr2[0]] = BFLIP16(val); - spuAddr2[0]++; - if(spuAddr2[0]>0xfffff) spuAddr2[0]=0; + spu->spuMem[spu->spuAddr2[0]] = BFLIP16(val); + spu->spuAddr2[0]++; + if(spu->spuAddr2[0]>0xfffff) spu->spuAddr2[0]=0; break; //-------------------------------------------------// case H_SPUctrl: @@ -935,17 +932,17 @@ EXPORT_GCC void CALLBACK SPU2writePS1Port(mips_cpu_context *cpu, unsigned long r break; //-------------------------------------------------// case H_SPUstat: - spuStat2[0]=val & 0xf800; + spu->spuStat2[0]=val & 0xf800; break; //-------------------------------------------------// case H_SPUReverbAddr: - spuRvbAddr2[0] = val; - SetReverbAddr(0); + spu->spuRvbAddr2[0] = val; + SetReverbAddr(spu, 0); break; //-------------------------------------------------// case H_SPUirqAddr: - spuIrq2[0] = val<<2; - pSpuIrq[0]=spuMemC+((u32) val<<1); + spu->spuIrq2[0] = val<<2; + spu->pSpuIrq[0]=spu->spuMemC+((u32) val<<1); break; //-------------------------------------------------// /* Volume settings appear to be at least 15-bit unsigned in this case. @@ -953,12 +950,12 @@ EXPORT_GCC void CALLBACK SPU2writePS1Port(mips_cpu_context *cpu, unsigned long r Check out "Chrono Cross: Shadow's End Forest" */ case H_SPUrvolL: - rvb[0].VolLeft=(s16)val; + spu->rvb[0].VolLeft=(s16)val; //printf("%d\n",val); break; //-------------------------------------------------// case H_SPUrvolR: - rvb[0].VolRight=(s16)val; + spu->rvb[0].VolRight=(s16)val; //printf("%d\n",val); break; //-------------------------------------------------// @@ -990,89 +987,90 @@ EXPORT_GCC void CALLBACK SPU2writePS1Port(mips_cpu_context *cpu, unsigned long r */ //-------------------------------------------------// case H_SPUon1: - SoundOn(0,16,val); + SoundOn(spu, 0,16,val); break; //-------------------------------------------------// case H_SPUon2: //printf("Boop: %08x: %04x\n",reg,val); - SoundOn(16,24,val); + SoundOn(spu, 16,24,val); break; //-------------------------------------------------// case H_SPUoff1: - SoundOff(0,16,val); + SoundOff(spu, 0,16,val); break; //-------------------------------------------------// case H_SPUoff2: - SoundOff(16,24,val); + SoundOff(spu, 16,24,val); // printf("Boop: %08x: %04x\n",reg,val); break; //-------------------------------------------------// case H_FMod1: - FModOn(0,16,val); + FModOn(spu, 0,16,val); break; //-------------------------------------------------// case H_FMod2: - FModOn(16,24,val); + FModOn(spu, 16,24,val); break; //-------------------------------------------------// case H_Noise1: - NoiseOn(0,16,val); + NoiseOn(spu, 0,16,val); break; //-------------------------------------------------// case H_Noise2: - NoiseOn(16,24,val); + NoiseOn(spu, 16,24,val); break; //-------------------------------------------------// case H_RVBon1: - ReverbOn(0,16,val,0); + ReverbOn(spu, 0,16,val,0); break; //-------------------------------------------------// case H_RVBon2: - ReverbOn(16,24,val,0); + ReverbOn(spu, 16,24,val,0); break; //-------------------------------------------------// case H_Reverb+0: - rvb[0].FB_SRC_A=val; - break; - - case H_Reverb+2 : rvb[0].FB_SRC_B=(s16)val; break; - case H_Reverb+4 : rvb[0].IIR_ALPHA=(s16)val; break; - case H_Reverb+6 : rvb[0].ACC_COEF_A=(s16)val; break; - case H_Reverb+8 : rvb[0].ACC_COEF_B=(s16)val; break; - case H_Reverb+10 : rvb[0].ACC_COEF_C=(s16)val; break; - case H_Reverb+12 : rvb[0].ACC_COEF_D=(s16)val; break; - case H_Reverb+14 : rvb[0].IIR_COEF=(s16)val; break; - case H_Reverb+16 : rvb[0].FB_ALPHA=(s16)val; break; - case H_Reverb+18 : rvb[0].FB_X=(s16)val; break; - case H_Reverb+20 : rvb[0].IIR_DEST_A0=(s16)val; break; - case H_Reverb+22 : rvb[0].IIR_DEST_A1=(s16)val; break; - case H_Reverb+24 : rvb[0].ACC_SRC_A0=(s16)val; break; - case H_Reverb+26 : rvb[0].ACC_SRC_A1=(s16)val; break; - case H_Reverb+28 : rvb[0].ACC_SRC_B0=(s16)val; break; - case H_Reverb+30 : rvb[0].ACC_SRC_B1=(s16)val; break; - case H_Reverb+32 : rvb[0].IIR_SRC_A0=(s16)val; break; - case H_Reverb+34 : rvb[0].IIR_SRC_A1=(s16)val; break; - case H_Reverb+36 : rvb[0].IIR_DEST_B0=(s16)val; break; - case H_Reverb+38 : rvb[0].IIR_DEST_B1=(s16)val; break; - case H_Reverb+40 : rvb[0].ACC_SRC_C0=(s16)val; break; - case H_Reverb+42 : rvb[0].ACC_SRC_C1=(s16)val; break; - case H_Reverb+44 : rvb[0].ACC_SRC_D0=(s16)val; break; - case H_Reverb+46 : rvb[0].ACC_SRC_D1=(s16)val; break; - case H_Reverb+48 : rvb[0].IIR_SRC_B1=(s16)val; break; - case H_Reverb+50 : rvb[0].IIR_SRC_B0=(s16)val; break; - case H_Reverb+52 : rvb[0].MIX_DEST_A0=(s16)val; break; - case H_Reverb+54 : rvb[0].MIX_DEST_A1=(s16)val; break; - case H_Reverb+56 : rvb[0].MIX_DEST_B0=(s16)val; break; - case H_Reverb+58 : rvb[0].MIX_DEST_B1=(s16)val; break; - case H_Reverb+60 : rvb[0].IN_COEF_L=(s16)val; break; - case H_Reverb+62 : rvb[0].IN_COEF_R=(s16)val; break; + spu->rvb[0].FB_SRC_A=val; + break; + + case H_Reverb+2 : spu->rvb[0].FB_SRC_B=(s16)val; break; + case H_Reverb+4 : spu->rvb[0].IIR_ALPHA=(s16)val; break; + case H_Reverb+6 : spu->rvb[0].ACC_COEF_A=(s16)val; break; + case H_Reverb+8 : spu->rvb[0].ACC_COEF_B=(s16)val; break; + case H_Reverb+10 : spu->rvb[0].ACC_COEF_C=(s16)val; break; + case H_Reverb+12 : spu->rvb[0].ACC_COEF_D=(s16)val; break; + case H_Reverb+14 : spu->rvb[0].IIR_COEF=(s16)val; break; + case H_Reverb+16 : spu->rvb[0].FB_ALPHA=(s16)val; break; + case H_Reverb+18 : spu->rvb[0].FB_X=(s16)val; break; + case H_Reverb+20 : spu->rvb[0].IIR_DEST_A0=(s16)val; break; + case H_Reverb+22 : spu->rvb[0].IIR_DEST_A1=(s16)val; break; + case H_Reverb+24 : spu->rvb[0].ACC_SRC_A0=(s16)val; break; + case H_Reverb+26 : spu->rvb[0].ACC_SRC_A1=(s16)val; break; + case H_Reverb+28 : spu->rvb[0].ACC_SRC_B0=(s16)val; break; + case H_Reverb+30 : spu->rvb[0].ACC_SRC_B1=(s16)val; break; + case H_Reverb+32 : spu->rvb[0].IIR_SRC_A0=(s16)val; break; + case H_Reverb+34 : spu->rvb[0].IIR_SRC_A1=(s16)val; break; + case H_Reverb+36 : spu->rvb[0].IIR_DEST_B0=(s16)val; break; + case H_Reverb+38 : spu->rvb[0].IIR_DEST_B1=(s16)val; break; + case H_Reverb+40 : spu->rvb[0].ACC_SRC_C0=(s16)val; break; + case H_Reverb+42 : spu->rvb[0].ACC_SRC_C1=(s16)val; break; + case H_Reverb+44 : spu->rvb[0].ACC_SRC_D0=(s16)val; break; + case H_Reverb+46 : spu->rvb[0].ACC_SRC_D1=(s16)val; break; + case H_Reverb+48 : spu->rvb[0].IIR_SRC_B1=(s16)val; break; + case H_Reverb+50 : spu->rvb[0].IIR_SRC_B0=(s16)val; break; + case H_Reverb+52 : spu->rvb[0].MIX_DEST_A0=(s16)val; break; + case H_Reverb+54 : spu->rvb[0].MIX_DEST_A1=(s16)val; break; + case H_Reverb+56 : spu->rvb[0].MIX_DEST_B0=(s16)val; break; + case H_Reverb+58 : spu->rvb[0].MIX_DEST_B1=(s16)val; break; + case H_Reverb+60 : spu->rvb[0].IN_COEF_L=(s16)val; break; + case H_Reverb+62 : spu->rvb[0].IN_COEF_R=(s16)val; break; } } EXPORT_GCC unsigned short CALLBACK SPU2readPS1Port(mips_cpu_context *cpu, unsigned long reg) { + spu2_state_t *spu = cpu->spu2; const u32 r=reg&0xfff; if(r>=0x0c00 && r<0x0d80) @@ -1087,24 +1085,24 @@ EXPORT_GCC unsigned short CALLBACK SPU2readPS1Port(mips_cpu_context *cpu, unsign break; case H_SPUstat: - return spuStat2[0]; + return spu->spuStat2[0]; break; case H_SPUaddr: - return (u16)(spuAddr2[0]>>2); + return (u16)(spu->spuAddr2[0]>>2); break; case H_SPUdata: { - u16 s=BFLIP16(spuMem[spuAddr2[0]]); - spuAddr2[0]++; - if(spuAddr2[0]>0xfffff) spuAddr2[0]=0; + u16 s=BFLIP16(spu->spuMem[spu->spuAddr2[0]]); + spu->spuAddr2[0]++; + if(spu->spuAddr2[0]>0xfffff) spu->spuAddr2[0]=0; return s; } break; case H_SPUirqAddr: - return spuIrq2[0]>>2; + return spu->spuIrq2[0]>>2; break; } @@ -1115,17 +1113,17 @@ EXPORT_GCC unsigned short CALLBACK SPU2readPS1Port(mips_cpu_context *cpu, unsign // SOUND ON register write //////////////////////////////////////////////////////////////////////// -void SoundOn(int start,int end,unsigned short val) // SOUND ON PSX COMAND +void SoundOn(spu2_state_t *spu, int start,int end,unsigned short val) // SOUND ON PSX COMAND { int ch; for(ch=start;ch>=1) // loop channels { - if((val&1) && s_chan[ch].pStart) // mmm... start has to be set before key on !?! + if((val&1) && spu->s_chan[ch].pStart) // mmm... start has to be set before key on !?! { - s_chan[ch].bIgnoreLoop=0; - s_chan[ch].bNew=1; - dwNewChannel2[ch/24]|=(1<<(ch%24)); // bitfield for faster testing + spu->s_chan[ch].bIgnoreLoop=0; + spu->s_chan[ch].bNew=1; + spu->dwNewChannel2[ch/24]|=(1<<(ch%24)); // bitfield for faster testing } } } @@ -1134,14 +1132,14 @@ void SoundOn(int start,int end,unsigned short val) // SOUND ON PSX COMAND // SOUND OFF register write //////////////////////////////////////////////////////////////////////// -void SoundOff(int start,int end,unsigned short val) // SOUND OFF PSX COMMAND +void SoundOff(spu2_state_t *spu, int start,int end,unsigned short val) // SOUND OFF PSX COMMAND { int ch; for(ch=start;ch>=1) // loop channels { - if(val&1) // && s_chan[i].bOn) mmm... + if(val&1) // && spu->s_chan[i].bOn) mmm... { - s_chan[ch].bStop=1; + spu->s_chan[ch].bStop=1; } } } @@ -1150,7 +1148,7 @@ void SoundOff(int start,int end,unsigned short val) // SOUND OFF PSX COMMAND // FMOD register write //////////////////////////////////////////////////////////////////////// -void FModOn(int start,int end,unsigned short val) // FMOD ON PSX COMMAND +void FModOn(spu2_state_t *spu, int start,int end,unsigned short val) // FMOD ON PSX COMMAND { int ch; @@ -1160,13 +1158,13 @@ void FModOn(int start,int end,unsigned short val) // FMOD ON PSX COMMAND { if(ch>0) { - s_chan[ch].bFMod=1; // --> sound channel - s_chan[ch-1].bFMod=2; // --> freq channel + spu->s_chan[ch].bFMod=1; // --> sound channel + spu->s_chan[ch-1].bFMod=2; // --> freq channel } } else { - s_chan[ch].bFMod=0; // --> turn off fmod + spu->s_chan[ch].bFMod=0; // --> turn off fmod } } } @@ -1175,7 +1173,7 @@ void FModOn(int start,int end,unsigned short val) // FMOD ON PSX COMMAND // NOISE register write //////////////////////////////////////////////////////////////////////// -void NoiseOn(int start,int end,unsigned short val) // NOISE ON PSX COMMAND +void NoiseOn(spu2_state_t *spu, int start,int end,unsigned short val) // NOISE ON PSX COMMAND { int ch; @@ -1183,11 +1181,11 @@ void NoiseOn(int start,int end,unsigned short val) // NOISE ON PSX COMMAND { if(val&1) // -> noise on/off { - s_chan[ch].bNoise=1; + spu->s_chan[ch].bNoise=1; } else { - s_chan[ch].bNoise=0; + spu->s_chan[ch].bNoise=0; } } } @@ -1199,9 +1197,9 @@ void NoiseOn(int start,int end,unsigned short val) // NOISE ON PSX COMMAND // please note: sweep and phase invert are wrong... but I've never seen // them used -void SetVolumeL(unsigned char ch,short vol) // LEFT VOLUME +void SetVolumeL(spu2_state_t *spu, unsigned char ch,short vol) // LEFT VOLUME { - s_chan[ch].iLeftVolRaw=vol; + spu->s_chan[ch].iLeftVolRaw=vol; if(vol&0x8000) // sweep? { @@ -1220,16 +1218,16 @@ void SetVolumeL(unsigned char ch,short vol) // LEFT VOLUME } vol&=0x3fff; - s_chan[ch].iLeftVolume=vol; // store volume + spu->s_chan[ch].iLeftVolume=vol; // store volume } //////////////////////////////////////////////////////////////////////// // RIGHT VOLUME register write //////////////////////////////////////////////////////////////////////// -void SetVolumeR(unsigned char ch,short vol) // RIGHT VOLUME +void SetVolumeR(spu2_state_t *spu, unsigned char ch,short vol) // RIGHT VOLUME { - s_chan[ch].iRightVolRaw=vol; + spu->s_chan[ch].iRightVolRaw=vol; if(vol&0x8000) // comments... see above :) { @@ -1247,14 +1245,14 @@ void SetVolumeR(unsigned char ch,short vol) // RIGHT VOLUME } vol&=0x3fff; - s_chan[ch].iRightVolume=vol; + spu->s_chan[ch].iRightVolume=vol; } //////////////////////////////////////////////////////////////////////// // PITCH register write //////////////////////////////////////////////////////////////////////// -void SetPitch(int ch,unsigned short val) // SET PITCH +void SetPitch(spu2_state_t *spu, int ch,unsigned short val) // SET PITCH { int NP; double intr; @@ -1265,19 +1263,19 @@ void SetPitch(int ch,unsigned short val) // SET PITCH intr = (double)48000.0f / (double)44100.0f * (double)NP; NP = (UINT32)intr; - s_chan[ch].iRawPitch=NP; + spu->s_chan[ch].iRawPitch=NP; NP=(44100L*NP)/4096L; // calc frequency if(NP<1) NP=1; // some security - s_chan[ch].iActFreq=NP; // store frequency + spu->s_chan[ch].iActFreq=NP; // store frequency } //////////////////////////////////////////////////////////////////////// // REVERB register write //////////////////////////////////////////////////////////////////////// -void ReverbOn(int start,int end,unsigned short val,int iRight) // REVERB ON PSX COMMAND +void ReverbOn(spu2_state_t *spu, int start,int end,unsigned short val,int iRight) // REVERB ON PSX COMMAND { int ch; @@ -1285,13 +1283,13 @@ void ReverbOn(int start,int end,unsigned short val,int iRight) // REVERB ON PSX { if(val&1) // -> reverb on/off { - if(iRight) s_chan[ch].bReverbR=1; - else s_chan[ch].bReverbL=1; + if(iRight) spu->s_chan[ch].bReverbR=1; + else spu->s_chan[ch].bReverbL=1; } else { - if(iRight) s_chan[ch].bReverbR=0; - else s_chan[ch].bReverbL=0; + if(iRight) spu->s_chan[ch].bReverbR=0; + else spu->s_chan[ch].bReverbL=0; } } } @@ -1300,20 +1298,20 @@ void ReverbOn(int start,int end,unsigned short val,int iRight) // REVERB ON PSX // REVERB START register write //////////////////////////////////////////////////////////////////////// -void SetReverbAddr(int core) +void SetReverbAddr(spu2_state_t *spu, int core) { - long val=spuRvbAddr2[core]; + long val=spu->spuRvbAddr2[core]; - if(rvb[core].StartAddr!=val) + if(spu->rvb[core].StartAddr!=val) { if(val<=0x27ff) { - rvb[core].StartAddr=rvb[core].CurrAddr=0; + spu->rvb[core].StartAddr=spu->rvb[core].CurrAddr=0; } else { - rvb[core].StartAddr=val; - rvb[core].CurrAddr=rvb[core].StartAddr; + spu->rvb[core].StartAddr=val; + spu->rvb[core].CurrAddr=spu->rvb[core].StartAddr; } } } @@ -1322,7 +1320,7 @@ void SetReverbAddr(int core) // DRY LEFT/RIGHT per voice switches //////////////////////////////////////////////////////////////////////// -void VolumeOn(int start,int end,unsigned short val,int iRight) // VOLUME ON PSX COMMAND +void VolumeOn(spu2_state_t *spu, int start,int end,unsigned short val,int iRight) // VOLUME ON PSX COMMAND { int ch; @@ -1330,13 +1328,13 @@ void VolumeOn(int start,int end,unsigned short val,int iRight) // VOLUME ON PSX { if(val&1) // -> reverb on/off { - if(iRight) s_chan[ch].bVolumeR=1; - else s_chan[ch].bVolumeL=1; + if(iRight) spu->s_chan[ch].bVolumeR=1; + else spu->s_chan[ch].bVolumeL=1; } else { - if(iRight) s_chan[ch].bVolumeR=0; - else s_chan[ch].bVolumeL=0; + if(iRight) spu->s_chan[ch].bVolumeR=0; + else spu->s_chan[ch].bVolumeL=0; } } } -- cgit v1.2.3