From 255cee09b71255051c2b40eae0c88bffce1f6f32 Mon Sep 17 00:00:00 2001 From: xleroy Date: Sat, 20 Apr 2013 07:54:52 +0000 Subject: Big merge of the newregalloc-int64 branch. Lots of changes in two directions: 1- new register allocator (+ live range splitting, spilling&reloading, etc) based on a posteriori validation using the Rideau-Leroy algorithm 2- support for 64-bit integer arithmetic (type "long long"). git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2200 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e --- arm/Machregsaux.ml | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'arm/Machregsaux.ml') diff --git a/arm/Machregsaux.ml b/arm/Machregsaux.ml index 642437e..5486c4b 100644 --- a/arm/Machregsaux.ml +++ b/arm/Machregsaux.ml @@ -17,13 +17,12 @@ open Machregs let register_names = [ ("R0", R0); ("R1", R1); ("R2", R2); ("R3", R3); ("R4", R4); ("R5", R5); ("R6", R6); ("R7", R7); - ("R8", R8); ("R9", R9); ("R11", R11); + ("R8", R8); ("R9", R9); ("R10", R10); ("R11", R11); + ("R12", R12); ("F0", F0); ("F1", F1); ("F2", F2); ("F3", F3); - ("F4", F4); ("F5", F5); + ("F4", F4); ("F5", F5); ("F6", F6); ("F7", F7); ("F8", F8); ("F9", F9); ("F10", F10); ("F11", F11); - ("F12", F12);("F13", F13);("F14", F14); ("F15", F15); - ("R10", IT1); ("R12", IT2); - ("F6", FT1); ("F7", FT2) + ("F12", F12);("F13", F13);("F14", F14); ("F15", F15) ] let name_of_register r = -- cgit v1.2.3