From 1fe68ad575178f7d8a775906947d2fed94d40976 Mon Sep 17 00:00:00 2001 From: xleroy Date: Sat, 30 Jul 2011 09:54:35 +0000 Subject: ARM codegen ported to new ABI + VFD floats git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@1692 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e --- arm/Asmgenproof1.v | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arm/Asmgenproof1.v') diff --git a/arm/Asmgenproof1.v b/arm/Asmgenproof1.v index d6ad203..8f6b337 100644 --- a/arm/Asmgenproof1.v +++ b/arm/Asmgenproof1.v @@ -207,8 +207,8 @@ Definition nontemp_preg (r: preg) : bool := | IR IR10 => false | IR IR12 => false | IR _ => true - | FR FR2 => false - | FR FR3 => false + | FR FR6 => false + | FR FR7 => false | FR _ => true | CR _ => false | PC => false @@ -1460,7 +1460,7 @@ Lemma transl_store_float_correct: exec_store chunk (Val.add rs1#r2 (Vint n)) r1 rs1 m1' = OK (nextinstr rs1) m2' -> exists rs2, exec_instr ge c (mk_instr r1 r2 n) rs1 m1' = OK rs2 m2' - /\ (forall (r: preg), r <> FR3 -> rs2 r = nextinstr rs1 r)) -> + /\ (forall (r: preg), r <> FR7 -> rs2 r = nextinstr rs1 r)) -> agree ms sp rs -> map mreg_type args = type_of_addressing addr -> mreg_type rd = Tfloat -> -- cgit v1.2.3