From 132e36fa0be63eb5672eda9168403d3fb74af2fa Mon Sep 17 00:00:00 2001
From: xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>
Date: Sat, 26 May 2012 07:32:01 +0000
Subject: CSE: add recognition of some combined operators, conditions, and
 addressing modes (cf. CombineOp.v) Memory model: cleaning up Memdata Inlining
 and new Constprop: updated for ARM.

git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@1902 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'Makefile')

diff --git a/Makefile b/Makefile
index 8c73798..793a4d4 100644
--- a/Makefile
+++ b/Makefile
@@ -60,7 +60,7 @@ BACKEND=\
   RTLtyping.v \
   Kildall.v \
   ConstpropOp.v Constprop.v ConstpropOpproof.v Constpropproof.v \
-  CSE.v CSEproof.v \
+  CombineOp.v CSE.v CombineOpproof.v CSEproof.v \
   Machregs.v Locations.v Conventions1.v Conventions.v LTL.v LTLtyping.v \
   InterfGraph.v Coloring.v Coloringproof.v \
   Allocation.v Allocproof.v Alloctyping.v \
-- 
cgit v1.2.3