From 6c7de165d1c82684359ccb630bb5f83263fa5ebc Mon Sep 17 00:00:00 2001 From: Abseil Team Date: Wed, 20 Jun 2018 06:25:23 -0700 Subject: Project import generated by Copybara. GitOrigin-RevId: d89dba27e35462d7457121b978fd79214205e686 Change-Id: I0eae80578a93a580820bc90d42e6b42faf7fde0a --- absl/base/internal/sysinfo.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'absl/base/internal/sysinfo.h') diff --git a/absl/base/internal/sysinfo.h b/absl/base/internal/sysinfo.h index 5bd1c500..18aa2e29 100644 --- a/absl/base/internal/sysinfo.h +++ b/absl/base/internal/sysinfo.h @@ -33,6 +33,7 @@ #include "absl/base/port.h" namespace absl { +inline namespace lts_2018_06_20 { namespace base_internal { // Nominal core processor cycles per second of each processor. This is _not_ @@ -58,6 +59,7 @@ using pid_t = DWORD; pid_t GetTID(); } // namespace base_internal +} // inline namespace lts_2018_06_20 } // namespace absl #endif // ABSL_BASE_INTERNAL_SYSINFO_H_ -- cgit v1.2.3