diff options
| author |  Benjamin Barenblat <bbaren@google.com> | 2023-09-07 13:26:18 -0400 |
|---|---|---|
| committer | Benjamin Barenblat <bbaren@google.com> | 2023-09-07 13:26:18 -0400 |
| commit | 94b8e998a4c04e3bd78202d429c1b804f77198ea (patch) | |
| tree | 69b8340d932695bae9b8ff6e006e656a448307be /debian/patches/cpu-features.diff | |
| parent | 494211f47140be3ff09f70843b111e23dbcfad5e (diff) | |
Update patches and bump internal namespace
Diffstat (limited to 'debian/patches/cpu-features.diff')
| -rw-r--r-- | debian/patches/cpu-features.diff | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/debian/patches/cpu-features.diff b/debian/patches/cpu-features.diff index 2f462e39..614c7dcb 100644 --- a/debian/patches/cpu-features.diff +++ b/debian/patches/cpu-features.diff @@ -17,25 +17,25 @@ Explicitly set supported CPU features. --- a/absl/base/config.h +++ b/absl/base/config.h -@@ -887,7 +887,7 @@ +@@ -848,7 +848,7 @@ // which architectures support the various x86 instruction sets. #ifdef ABSL_INTERNAL_HAVE_SSE #error ABSL_INTERNAL_HAVE_SSE cannot be directly set -#elif defined(__SSE__) +#elif defined(__x86_64__) #define ABSL_INTERNAL_HAVE_SSE 1 - #elif defined(_M_X64) || (defined(_M_IX86_FP) && _M_IX86_FP >= 1) - // MSVC only defines _M_IX86_FP for x86 32-bit code, and _M_IX86_FP >= 1 -@@ -902,7 +902,7 @@ + #elif (defined(_M_X64) || (defined(_M_IX86_FP) && _M_IX86_FP >= 1)) && \ + !defined(_M_ARM64EC) +@@ -864,7 +864,7 @@ // which architectures support the various x86 instruction sets. #ifdef ABSL_INTERNAL_HAVE_SSE2 #error ABSL_INTERNAL_HAVE_SSE2 cannot be directly set -#elif defined(__SSE2__) +#elif defined(__x86_64__) #define ABSL_INTERNAL_HAVE_SSE2 1 - #elif defined(_M_X64) || (defined(_M_IX86_FP) && _M_IX86_FP >= 2) - // MSVC only defines _M_IX86_FP for x86 32-bit code, and _M_IX86_FP >= 2 -@@ -923,8 +923,6 @@ + #elif (defined(_M_X64) || (defined(_M_IX86_FP) && _M_IX86_FP >= 2)) && \ + !defined(_M_ARM64EC) +@@ -886,8 +886,6 @@ // by the CPU. #ifdef ABSL_INTERNAL_HAVE_SSSE3 #error ABSL_INTERNAL_HAVE_SSSE3 cannot be directly set @@ -44,7 +44,7 @@ Explicitly set supported CPU features. #endif // ABSL_INTERNAL_HAVE_ARM_NEON is used for compile-time detection of NEON (ARM -@@ -936,7 +934,7 @@ +@@ -899,7 +897,7 @@ // https://llvm.org/docs/CompileCudaWithLLVM.html#detecting-clang-vs-nvcc-from-code #ifdef ABSL_INTERNAL_HAVE_ARM_NEON #error ABSL_INTERNAL_HAVE_ARM_NEON cannot be directly set |