From 3337b846204c3d18fde4e28ad1558f5e73532ccc Mon Sep 17 00:00:00 2001 From: Lioncash Date: Fri, 2 Jan 2015 18:21:45 -0500 Subject: dyncom: Implement SMLAD/SMUAD/SMLSD/SMUSD --- src/core/arm/interpreter/armsupp.cpp | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'src/core/arm/interpreter/armsupp.cpp') diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp index 426b6783..eec34143 100644 --- a/src/core/arm/interpreter/armsupp.cpp +++ b/src/core/arm/interpreter/armsupp.cpp @@ -453,12 +453,14 @@ ARMul_AddOverflow (ARMul_State * state, ARMword a, ARMword b, ARMword result) ASSIGNV (AddOverflow (a, b, result)); } -/* Assigns the Q flag if the given result is considered an overflow from the addition of a and b */ -void ARMul_AddOverflowQ(ARMul_State* state, ARMword a, ARMword b) +// Returns true if the Q flag should be set as a result of overflow. +bool ARMul_AddOverflowQ(ARMword a, ARMword b) { u32 result = a + b; if (((result ^ a) & (u32)0x80000000) && ((a ^ b) & (u32)0x80000000) == 0) - SETQ; + return true; + + return false; } /* Assigns the C flag after an subtraction of a and b to give result. */ -- cgit v1.2.3