From 0ecc6e2f0421aef95f0dd30466e4c69e15020e83 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 26 Jul 2015 05:39:54 -0400 Subject: dyncom: Use ARMul_State as an object Gets rid of C-like parameter passing. --- src/core/arm/dyncom/arm_dyncom.cpp | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) (limited to 'src/core/arm/dyncom/arm_dyncom.cpp') diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp index a51a3acf..9228a49a 100644 --- a/src/core/arm/dyncom/arm_dyncom.cpp +++ b/src/core/arm/dyncom/arm_dyncom.cpp @@ -18,16 +18,7 @@ #include "core/core_timing.h" ARM_DynCom::ARM_DynCom(PrivilegeMode initial_mode) { - state = Common::make_unique(); - - // Reset the core to initial state - ARMul_Reset(state.get()); - - // Switch to the desired privilege mode. - switch_mode(state.get(), initial_mode); - - state->Reg[13] = 0x10000000; // Set stack pointer to the top of the stack - state->Reg[15] = 0x00000000; + state = Common::make_unique(initial_mode); } ARM_DynCom::~ARM_DynCom() { -- cgit v1.2.3 From 816b1ca776fe9d8ac0e618f82afd8e4b5549d582 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 26 Jul 2015 11:39:57 -0400 Subject: dyncom: Use std::array for register arrays --- src/core/arm/dyncom/arm_dyncom.cpp | 8 +++--- src/core/arm/skyeye_common/armstate.h | 49 ++++++++++++++++++----------------- 2 files changed, 29 insertions(+), 28 deletions(-) (limited to 'src/core/arm/dyncom/arm_dyncom.cpp') diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp index 9228a49a..c665f706 100644 --- a/src/core/arm/dyncom/arm_dyncom.cpp +++ b/src/core/arm/dyncom/arm_dyncom.cpp @@ -82,8 +82,8 @@ void ARM_DynCom::ResetContext(Core::ThreadContext& context, u32 stack_top, u32 e } void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) { - memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers)); - memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers)); + memcpy(ctx.cpu_registers, state->Reg.data(), sizeof(ctx.cpu_registers)); + memcpy(ctx.fpu_registers, state->ExtReg.data(), sizeof(ctx.fpu_registers)); ctx.sp = state->Reg[13]; ctx.lr = state->Reg[14]; @@ -95,8 +95,8 @@ void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) { } void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) { - memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers)); - memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers)); + memcpy(state->Reg.data(), ctx.cpu_registers, sizeof(ctx.cpu_registers)); + memcpy(state->ExtReg.data(), ctx.fpu_registers, sizeof(ctx.fpu_registers)); state->Reg[13] = ctx.sp; state->Reg[14] = ctx.lr; diff --git a/src/core/arm/skyeye_common/armstate.h b/src/core/arm/skyeye_common/armstate.h index 041e65cc..88c1dab9 100644 --- a/src/core/arm/skyeye_common/armstate.h +++ b/src/core/arm/skyeye_common/armstate.h @@ -17,6 +17,7 @@ #pragma once +#include #include #include "common/common_types.h" @@ -141,7 +142,7 @@ enum { RUN = 3 // Continuous execution }; -#define VFP_REG_NUM 64 + struct ARMul_State final { public: @@ -177,34 +178,34 @@ public: return TFlag ? 2 : 4; } - u32 Emulate; // To start and stop emulation - - // Order of the following register should not be modified - u32 Reg[16]; // The current register file - u32 Cpsr; // The current PSR - u32 Spsr_copy; - u32 phys_pc; - u32 Reg_usr[2]; - u32 Reg_svc[2]; // R13_SVC R14_SVC - u32 Reg_abort[2]; // R13_ABORT R14_ABORT - u32 Reg_undef[2]; // R13 UNDEF R14 UNDEF - u32 Reg_irq[2]; // R13_IRQ R14_IRQ - u32 Reg_firq[7]; // R8---R14 FIRQ - u32 Spsr[7]; // The exception psr's - u32 Mode; // The current mode - u32 Bank; // The current register bank - u32 exclusive_tag; // The address for which the local monitor is in exclusive access mode - u32 exclusive_state; - u32 exclusive_result; - u32 CP15[CP15_REGISTER_COUNT]; + std::array Reg; // The current register file + std::array Reg_usr; + std::array Reg_svc; // R13_SVC R14_SVC + std::array Reg_abort; // R13_ABORT R14_ABORT + std::array Reg_undef; // R13 UNDEF R14 UNDEF + std::array Reg_irq; // R13_IRQ R14_IRQ + std::array Reg_firq; // R8---R14 FIRQ + std::array Spsr; // The exception psr's + std::array CP15; // FPSID, FPSCR, and FPEXC - u32 VFP[VFP_SYSTEM_REGISTER_COUNT]; + std::array VFP; + // VFPv2 and VFPv3-D16 has 16 doubleword registers (D0-D16 or S0-S31). // VFPv3-D32/ASIMD may have up to 32 doubleword registers (D0-D31), // and only 32 singleword registers are accessible (S0-S31). - u32 ExtReg[VFP_REG_NUM]; - /* ---- End of the ordered registers ---- */ + std::array ExtReg; + + u32 Emulate; // To start and stop emulation + u32 Cpsr; // The current PSR + u32 Spsr_copy; + u32 phys_pc; + + u32 Mode; // The current mode + u32 Bank; // The current register bank + u32 exclusive_tag; // The address for which the local monitor is in exclusive access mode + u32 exclusive_state; + u32 exclusive_result; u32 NFlag, ZFlag, CFlag, VFlag, IFFlags; // Dummy flags for speed unsigned int shifter_carry_out; -- cgit v1.2.3