From d66a12c6f6e612ba4574652a8087cd878c965b92 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Fri, 17 Apr 2015 20:44:54 -0400 Subject: dyncom: Remove unused/unnecessary VFP cruft --- src/core/CMakeLists.txt | 1 - src/core/arm/interpreter/armcopro.cpp | 142 -------- src/core/arm/interpreter/arminit.cpp | 17 +- src/core/arm/skyeye_common/armdefs.h | 26 -- src/core/arm/skyeye_common/armemu.h | 9 - src/core/arm/skyeye_common/vfp/vfp.cpp | 621 +-------------------------------- src/core/arm/skyeye_common/vfp/vfp.h | 22 +- 7 files changed, 15 insertions(+), 823 deletions(-) delete mode 100644 src/core/arm/interpreter/armcopro.cpp diff --git a/src/core/CMakeLists.txt b/src/core/CMakeLists.txt index 0528175b..42733b95 100644 --- a/src/core/CMakeLists.txt +++ b/src/core/CMakeLists.txt @@ -6,7 +6,6 @@ set(SRCS arm/dyncom/arm_dyncom_interpreter.cpp arm/dyncom/arm_dyncom_run.cpp arm/dyncom/arm_dyncom_thumb.cpp - arm/interpreter/armcopro.cpp arm/interpreter/arminit.cpp arm/interpreter/armsupp.cpp arm/skyeye_common/vfp/vfp.cpp diff --git a/src/core/arm/interpreter/armcopro.cpp b/src/core/arm/interpreter/armcopro.cpp deleted file mode 100644 index 4ae0c52e..00000000 --- a/src/core/arm/interpreter/armcopro.cpp +++ /dev/null @@ -1,142 +0,0 @@ -/* armcopro.c -- co-processor interface: ARM6 Instruction Emulator. - Copyright (C) 1994, 2000 Advanced RISC Machines Ltd. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#include "core/arm/skyeye_common/armdefs.h" -#include "core/arm/skyeye_common/armemu.h" -#include "core/arm/skyeye_common/vfp/vfp.h" - -// Dummy Co-processors. - -static unsigned int NoCoPro3R(ARMul_State* state, unsigned int a, ARMword b) -{ - return ARMul_CANT; -} - -static unsigned int NoCoPro4R(ARMul_State* state, unsigned int a, ARMword b, ARMword c) -{ - return ARMul_CANT; -} - -static unsigned int NoCoPro4W(ARMul_State* state, unsigned int a, ARMword b, ARMword* c) -{ - return ARMul_CANT; -} - -static unsigned int NoCoPro5R(ARMul_State* state, unsigned int a, ARMword b, ARMword c, ARMword d) -{ - return ARMul_CANT; -} - -static unsigned int NoCoPro5W(ARMul_State* state, unsigned int a, ARMword b, ARMword* c, ARMword* d) -{ - return ARMul_CANT; -} - -// Install co-processor instruction handlers in this routine. -void ARMul_CoProInit(ARMul_State* state) -{ - // Initialise tham all first. - for (unsigned int i = 0; i < 16; i++) - ARMul_CoProDetach(state, i); - - // Install CoPro Instruction handlers here. - // The format is: - // ARMul_CoProAttach (state, CP Number, Init routine, Exit routine - // LDC routine, STC routine, MRC routine, MCR routine, - // CDP routine, Read Reg routine, Write Reg routine). - if (state->is_v6) { - ARMul_CoProAttach(state, 10, VFPInit, NULL, VFPLDC, VFPSTC, - VFPMRC, VFPMCR, VFPMRRC, VFPMCRR, VFPCDP, NULL, NULL); - ARMul_CoProAttach(state, 11, VFPInit, NULL, VFPLDC, VFPSTC, - VFPMRC, VFPMCR, VFPMRRC, VFPMCRR, VFPCDP, NULL, NULL); - - /*ARMul_CoProAttach (state, 15, MMUInit, NULL, NULL, NULL, - MMUMRC, MMUMCR, NULL, NULL, NULL, NULL, NULL);*/ - } - - // No handlers below here. - - // Call all the initialisation routines. - for (unsigned int i = 0; i < 16; i++) { - if (state->CPInit[i]) - (state->CPInit[i]) (state); - } -} - -// Install co-processor finalisation routines in this routine. -void ARMul_CoProExit(ARMul_State * state) -{ - for (unsigned int i = 0; i < 16; i++) - if (state->CPExit[i]) - (state->CPExit[i]) (state); - - // Detach all handlers. - for (unsigned int i = 0; i < 16; i++) - ARMul_CoProDetach(state, i); -} - -// Routines to hook Co-processors into ARMulator. - -void -ARMul_CoProAttach(ARMul_State* state, -unsigned number, -ARMul_CPInits* init, -ARMul_CPExits* exit, -ARMul_LDCs* ldc, -ARMul_STCs* stc, -ARMul_MRCs* mrc, -ARMul_MCRs* mcr, -ARMul_MRRCs* mrrc, -ARMul_MCRRs* mcrr, -ARMul_CDPs* cdp, -ARMul_CPReads* read, ARMul_CPWrites* write) -{ - if (init != NULL) - state->CPInit[number] = init; - if (exit != NULL) - state->CPExit[number] = exit; - if (ldc != NULL) - state->LDC[number] = ldc; - if (stc != NULL) - state->STC[number] = stc; - if (mrc != NULL) - state->MRC[number] = mrc; - if (mcr != NULL) - state->MCR[number] = mcr; - if (mrrc != NULL) - state->MRRC[number] = mrrc; - if (mcrr != NULL) - state->MCRR[number] = mcrr; - if (cdp != NULL) - state->CDP[number] = cdp; - if (read != NULL) - state->CPRead[number] = read; - if (write != NULL) - state->CPWrite[number] = write; -} - -void ARMul_CoProDetach(ARMul_State* state, unsigned number) -{ - ARMul_CoProAttach(state, number, NULL, NULL, - NoCoPro4R, NoCoPro4W, NoCoPro4W, NoCoPro4R, - NoCoPro5W, NoCoPro5R, NoCoPro3R, NULL, NULL); - - state->CPInit[number] = NULL; - state->CPExit[number] = NULL; - state->CPRead[number] = NULL; - state->CPWrite[number] = NULL; -} diff --git a/src/core/arm/interpreter/arminit.cpp b/src/core/arm/interpreter/arminit.cpp index 1d732fe8..6fa028f4 100644 --- a/src/core/arm/interpreter/arminit.cpp +++ b/src/core/arm/interpreter/arminit.cpp @@ -19,6 +19,7 @@ #include "core/mem_map.h" #include "core/arm/skyeye_common/armdefs.h" #include "core/arm/skyeye_common/armemu.h" +#include "core/arm/skyeye_common/vfp/vfp.h" /***************************************************************************\ * Returns a new instantiation of the ARMulator's state * @@ -56,15 +57,11 @@ ARMul_State* ARMul_NewState(ARMul_State* state) void ARMul_SelectProcessor(ARMul_State* state, unsigned properties) { - state->is_v4 = (properties & (ARM_v4_Prop | ARM_v5_Prop)) != 0; - state->is_v5 = (properties & ARM_v5_Prop) != 0; - state->is_v5e = (properties & ARM_v5e_Prop) != 0; - state->is_v6 = (properties & ARM_v6_Prop) != 0; - state->is_v7 = (properties & ARM_v7_Prop) != 0; - - // Only initialse the coprocessor support once we - // know what kind of chip we are dealing with. - ARMul_CoProInit(state); + state->is_v4 = (properties & (ARM_v4_Prop | ARM_v5_Prop)) != 0; + state->is_v5 = (properties & ARM_v5_Prop) != 0; + state->is_v5e = (properties & ARM_v5e_Prop) != 0; + state->is_v6 = (properties & ARM_v6_Prop) != 0; + state->is_v7 = (properties & ARM_v7_Prop) != 0; } // Resets certain MPCore CP15 values to their ARM-defined reset values. @@ -130,6 +127,8 @@ static void ResetMPCoreCP15Registers(ARMul_State* cpu) \***************************************************************************/ void ARMul_Reset(ARMul_State* state) { + VFPInit(state); + state->NextInstr = 0; state->Reg[15] = 0; diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h index 743e935f..64ca523e 100644 --- a/src/core/arm/skyeye_common/armdefs.h +++ b/src/core/arm/skyeye_common/armdefs.h @@ -55,18 +55,6 @@ typedef u16 ARMhword; // must be 16 bits wide typedef u8 ARMbyte; // must be 8 bits wide typedef struct ARMul_State ARMul_State; -typedef unsigned ARMul_CPInits(ARMul_State* state); -typedef unsigned ARMul_CPExits(ARMul_State* state); -typedef unsigned ARMul_LDCs(ARMul_State* state, unsigned type, ARMword instr, ARMword value); -typedef unsigned ARMul_STCs(ARMul_State* state, unsigned type, ARMword instr, ARMword* value); -typedef unsigned ARMul_MRCs(ARMul_State* state, unsigned type, ARMword instr, ARMword* value); -typedef unsigned ARMul_MCRs(ARMul_State* state, unsigned type, ARMword instr, ARMword value); -typedef unsigned ARMul_MRRCs(ARMul_State* state, unsigned type, ARMword instr, ARMword* value1, ARMword* value2); -typedef unsigned ARMul_MCRRs(ARMul_State* state, unsigned type, ARMword instr, ARMword value1, ARMword value2); -typedef unsigned ARMul_CDPs(ARMul_State* state, unsigned type, ARMword instr); -typedef unsigned ARMul_CPReads(ARMul_State* state, unsigned reg, ARMword* value); -typedef unsigned ARMul_CPWrites(ARMul_State* state, unsigned reg, ARMword value); - #define VFP_REG_NUM 64 struct ARMul_State { @@ -117,20 +105,6 @@ struct ARMul_State unsigned NextInstr; unsigned VectorCatch; // Caught exception mask - ARMul_CPInits* CPInit[16]; // Coprocessor initialisers - ARMul_CPExits* CPExit[16]; // Coprocessor finalisers - ARMul_LDCs* LDC[16]; // LDC instruction - ARMul_STCs* STC[16]; // STC instruction - ARMul_MRCs* MRC[16]; // MRC instruction - ARMul_MCRs* MCR[16]; // MCR instruction - ARMul_MRRCs* MRRC[16]; // MRRC instruction - ARMul_MCRRs* MCRR[16]; // MCRR instruction - ARMul_CDPs* CDP[16]; // CDP instruction - ARMul_CPReads* CPRead[16]; // Read CP register - ARMul_CPWrites* CPWrite[16]; // Write CP register - unsigned char* CPData[16]; // Coprocessor data - unsigned char const* CPRegWords[16]; // Map of coprocessor register sizes - unsigned NresetSig; // Reset the processor unsigned NfiqSig; unsigned NirqSig; diff --git a/src/core/arm/skyeye_common/armemu.h b/src/core/arm/skyeye_common/armemu.h index 2a1c5077..b8113dfc 100644 --- a/src/core/arm/skyeye_common/armemu.h +++ b/src/core/arm/skyeye_common/armemu.h @@ -57,12 +57,3 @@ enum { }; #define FLUSHPIPE state->NextInstr |= PRIMEPIPE - -// Coprocessor support functions. -extern void ARMul_CoProInit(ARMul_State*); -extern void ARMul_CoProExit(ARMul_State*); -extern void ARMul_CoProAttach(ARMul_State*, unsigned, ARMul_CPInits*, - ARMul_CPExits*, ARMul_LDCs*, ARMul_STCs*, - ARMul_MRCs*, ARMul_MCRs*, ARMul_MRRCs*, ARMul_MCRRs*, - ARMul_CDPs*, ARMul_CPReads*, ARMul_CPWrites*); -extern void ARMul_CoProDetach(ARMul_State*, unsigned); diff --git a/src/core/arm/skyeye_common/vfp/vfp.cpp b/src/core/arm/skyeye_common/vfp/vfp.cpp index d793261f..d0fa157a 100644 --- a/src/core/arm/skyeye_common/vfp/vfp.cpp +++ b/src/core/arm/skyeye_common/vfp/vfp.cpp @@ -37,296 +37,18 @@ unsigned VFPInit(ARMul_State* state) return 0; } -unsigned VFPMRC(ARMul_State* state, unsigned type, u32 instr, u32* value) -{ - /* MRC ,,,,{,} */ - int CoProc = BITS(instr, 8, 11); /* 10 or 11 */ - int OPC_1 = BITS(instr, 21, 23); - int Rt = BITS(instr, 12, 15); - int CRn = BITS(instr, 16, 19); - int CRm = BITS(instr, 0, 3); - int OPC_2 = BITS(instr, 5, 7); - - /* TODO check access permission */ - - /* CRn/opc1 CRm/opc2 */ - - if (CoProc == 10 || CoProc == 11) - { - if (OPC_1 == 0x0 && CRm == 0 && (OPC_2 & 0x3) == 0) - { - /* VMOV r to s */ - /* Transfering Rt is not mandatory, as the value of interest is pointed by value */ - VMOVBRS(state, BIT(instr, 20), Rt, BIT(instr, 7)|CRn<<1, value); - return ARMul_DONE; - } - - if (OPC_1 == 0x7 && CRm == 0 && OPC_2 == 0) - { - VMRS(state, CRn, Rt, value); - return ARMul_DONE; - } - } - LOG_WARNING(Core_ARM11, "Can't identify %x, CoProc %x, OPC_1 %x, Rt %x, CRn %x, CRm %x, OPC_2 %x\n", - instr, CoProc, OPC_1, Rt, CRn, CRm, OPC_2); - - return ARMul_CANT; -} - -unsigned VFPMCR(ARMul_State* state, unsigned type, u32 instr, u32 value) -{ - /* MCR ,,,,{,} */ - int CoProc = BITS(instr, 8, 11); /* 10 or 11 */ - int OPC_1 = BITS(instr, 21, 23); - int Rt = BITS(instr, 12, 15); - int CRn = BITS(instr, 16, 19); - int CRm = BITS(instr, 0, 3); - int OPC_2 = BITS(instr, 5, 7); - - /* TODO check access permission */ - - /* CRn/opc1 CRm/opc2 */ - if (CoProc == 10 || CoProc == 11) - { - if (OPC_1 == 0x0 && CRm == 0 && (OPC_2 & 0x3) == 0) - { - /* VMOV s to r */ - /* Transfering Rt is not mandatory, as the value of interest is pointed by value */ - VMOVBRS(state, BIT(instr, 20), Rt, BIT(instr, 7)|CRn<<1, &value); - return ARMul_DONE; - } - - if (OPC_1 == 0x7 && CRm == 0 && OPC_2 == 0) - { - VMSR(state, CRn, Rt); - return ARMul_DONE; - } - - if ((OPC_1 & 0x4) == 0 && CoProc == 11 && CRm == 0) - { - VFP_DEBUG_UNIMPLEMENTED(VMOVBRC); - return ARMul_DONE; - } - - if (CoProc == 11 && CRm == 0) - { - VFP_DEBUG_UNIMPLEMENTED(VMOVBCR); - return ARMul_DONE; - } - } - LOG_WARNING(Core_ARM11, "Can't identify %x, CoProc %x, OPC_1 %x, Rt %x, CRn %x, CRm %x, OPC_2 %x\n", - instr, CoProc, OPC_1, Rt, CRn, CRm, OPC_2); - - return ARMul_CANT; -} - -unsigned VFPMRRC(ARMul_State* state, unsigned type, u32 instr, u32* value1, u32* value2) -{ - /* MCRR ,,,, */ - int CoProc = BITS(instr, 8, 11); /* 10 or 11 */ - int OPC_1 = BITS(instr, 4, 7); - int Rt = BITS(instr, 12, 15); - int Rt2 = BITS(instr, 16, 19); - int CRm = BITS(instr, 0, 3); - - if (CoProc == 10 || CoProc == 11) - { - if (CoProc == 10 && (OPC_1 & 0xD) == 1) - { - VMOVBRRSS(state, BIT(instr, 20), Rt, Rt2, BIT(instr, 5)<<4|CRm, value1, value2); - return ARMul_DONE; - } - - if (CoProc == 11 && (OPC_1 & 0xD) == 1) - { - /* Transfering Rt and Rt2 is not mandatory, as the value of interest is pointed by value1 and value2 */ - VMOVBRRD(state, BIT(instr, 20), Rt, Rt2, BIT(instr, 5)<<4|CRm, value1, value2); - return ARMul_DONE; - } - } - LOG_WARNING(Core_ARM11, "Can't identify %x, CoProc %x, OPC_1 %x, Rt %x, Rt2 %x, CRm %x\n", - instr, CoProc, OPC_1, Rt, Rt2, CRm); - - return ARMul_CANT; -} - -unsigned VFPMCRR(ARMul_State* state, unsigned type, u32 instr, u32 value1, u32 value2) -{ - /* MCRR ,,,, */ - int CoProc = BITS(instr, 8, 11); /* 10 or 11 */ - int OPC_1 = BITS(instr, 4, 7); - int Rt = BITS(instr, 12, 15); - int Rt2 = BITS(instr, 16, 19); - int CRm = BITS(instr, 0, 3); - - /* TODO check access permission */ - - /* CRn/opc1 CRm/opc2 */ - - if (CoProc == 11 || CoProc == 10) - { - if (CoProc == 10 && (OPC_1 & 0xD) == 1) - { - VMOVBRRSS(state, BIT(instr, 20), Rt, Rt2, BIT(instr, 5)<<4|CRm, &value1, &value2); - return ARMul_DONE; - } - - if (CoProc == 11 && (OPC_1 & 0xD) == 1) - { - /* Transfering Rt and Rt2 is not mandatory, as the value of interest is pointed by value1 and value2 */ - VMOVBRRD(state, BIT(instr, 20), Rt, Rt2, BIT(instr, 5)<<4|CRm, &value1, &value2); - return ARMul_DONE; - } - } - LOG_WARNING(Core_ARM11, "Can't identify %x, CoProc %x, OPC_1 %x, Rt %x, Rt2 %x, CRm %x\n", - instr, CoProc, OPC_1, Rt, Rt2, CRm); - - return ARMul_CANT; -} - -unsigned VFPSTC(ARMul_State* state, unsigned type, u32 instr, u32 * value) -{ - /* STC{L} ,,[],