aboutsummaryrefslogtreecommitdiffhomepage
path: root/src/core/hw
diff options
context:
space:
mode:
Diffstat (limited to 'src/core/hw')
-rw-r--r--src/core/hw/gpu.cpp (renamed from src/core/hw/lcd.cpp)71
-rw-r--r--src/core/hw/gpu.h (renamed from src/core/hw/lcd.h)36
-rw-r--r--src/core/hw/hw.cpp16
-rw-r--r--src/core/hw/ndma.cpp4
4 files changed, 87 insertions, 40 deletions
diff --git a/src/core/hw/lcd.cpp b/src/core/hw/gpu.cpp
index 6cbce14e..f0ca4ead 100644
--- a/src/core/hw/lcd.cpp
+++ b/src/core/hw/gpu.cpp
@@ -7,13 +7,13 @@
#include "core/core.h"
#include "core/mem_map.h"
-#include "core/hw/lcd.h"
+#include "core/hle/kernel/thread.h"
+#include "core/hw/gpu.h"
#include "video_core/video_core.h"
-#include "core/hle/kernel/thread.h"
-namespace LCD {
+namespace GPU {
Registers g_regs;
@@ -59,7 +59,7 @@ const FramebufferLocation GetFramebufferLocation() {
} else if ((g_regs.framebuffer_top_right_1 & ~Memory::FCRAM_MASK) == Memory::FCRAM_PADDR) {
return FRAMEBUFFER_LOCATION_FCRAM;
} else {
- ERROR_LOG(LCD, "unknown framebuffer location!");
+ ERROR_LOG(GPU, "unknown framebuffer location!");
}
return FRAMEBUFFER_LOCATION_UNKNOWN;
}
@@ -76,7 +76,7 @@ const u8* GetFramebufferPointer(const u32 address) {
case FRAMEBUFFER_LOCATION_VRAM:
return (const u8*)Memory::GetPointer(Memory::VirtualAddressFromPhysical_VRAM(address));
default:
- ERROR_LOG(LCD, "unknown framebuffer location");
+ ERROR_LOG(GPU, "unknown framebuffer location");
}
return NULL;
}
@@ -84,34 +84,73 @@ const u8* GetFramebufferPointer(const u32 address) {
template <typename T>
inline void Read(T &var, const u32 addr) {
switch (addr) {
- case REG_FRAMEBUFFER_TOP_LEFT_1:
+ case Registers::FramebufferTopLeft1:
var = g_regs.framebuffer_top_left_1;
break;
- case REG_FRAMEBUFFER_TOP_LEFT_2:
+
+ case Registers::FramebufferTopLeft2:
var = g_regs.framebuffer_top_left_2;
break;
- case REG_FRAMEBUFFER_TOP_RIGHT_1:
+
+ case Registers::FramebufferTopRight1:
var = g_regs.framebuffer_top_right_1;
break;
- case REG_FRAMEBUFFER_TOP_RIGHT_2:
+
+ case Registers::FramebufferTopRight2:
var = g_regs.framebuffer_top_right_2;
break;
- case REG_FRAMEBUFFER_SUB_LEFT_1:
+
+ case Registers::FramebufferSubLeft1:
var = g_regs.framebuffer_sub_left_1;
break;
- case REG_FRAMEBUFFER_SUB_RIGHT_1:
+
+ case Registers::FramebufferSubRight1:
var = g_regs.framebuffer_sub_right_1;
break;
+
+ case Registers::CommandListSize:
+ var = g_regs.command_list_size;
+ break;
+
+ case Registers::CommandListAddress:
+ var = g_regs.command_list_address;
+ break;
+
+ case Registers::ProcessCommandList:
+ var = g_regs.command_processing_enabled;
+ break;
+
default:
- ERROR_LOG(LCD, "unknown Read%d @ 0x%08X", sizeof(var) * 8, addr);
+ ERROR_LOG(GPU, "unknown Read%d @ 0x%08X", sizeof(var) * 8, addr);
break;
}
-
}
template <typename T>
inline void Write(u32 addr, const T data) {
- ERROR_LOG(LCD, "unknown Write%d 0x%08X @ 0x%08X", sizeof(data) * 8, data, addr);
+ switch (static_cast<Registers::Id>(addr)) {
+ case Registers::CommandListSize:
+ g_regs.command_list_size = data;
+ break;
+
+ case Registers::CommandListAddress:
+ g_regs.command_list_address = data;
+ break;
+
+ case Registers::ProcessCommandList:
+ g_regs.command_processing_enabled = data;
+ if (g_regs.command_processing_enabled & 1)
+ {
+ // u32* buffer = (u32*)Memory::GetPointer(g_regs.command_list_address << 3);
+ ERROR_LOG(GPU, "Beginning %x bytes of commands from address %x", g_regs.command_list_size, g_regs.command_list_address << 3);
+ // TODO: Process command list!
+ }
+ break;
+
+ default:
+ ERROR_LOG(GPU, "unknown Write%d 0x%08X @ 0x%08X", sizeof(data) * 8, data, addr);
+ break;
+ }
}
// Explicitly instantiate template functions because we aren't defining this in the header:
@@ -142,12 +181,12 @@ void Update() {
void Init() {
g_last_ticks = Core::g_app_core->GetTicks();
SetFramebufferLocation(FRAMEBUFFER_LOCATION_FCRAM);
- NOTICE_LOG(LCD, "initialized OK");
+ NOTICE_LOG(GPU, "initialized OK");
}
/// Shutdown hardware
void Shutdown() {
- NOTICE_LOG(LCD, "shutdown OK");
+ NOTICE_LOG(GPU, "shutdown OK");
}
} // namespace
diff --git a/src/core/hw/lcd.h b/src/core/hw/gpu.h
index 7484f8f6..3314ba98 100644
--- a/src/core/hw/lcd.h
+++ b/src/core/hw/gpu.h
@@ -6,12 +6,27 @@
#include "common/common_types.h"
-namespace LCD {
+namespace GPU {
static const u32 kFrameCycles = 268123480 / 60; ///< 268MHz / 60 frames per second
static const u32 kFrameTicks = kFrameCycles / 3; ///< Approximate number of instructions/frame
struct Registers {
+ enum Id : u32 {
+ FramebufferTopLeft1 = 0x1EF00468, // Main LCD, first framebuffer for 3D left
+ FramebufferTopLeft2 = 0x1EF0046C, // Main LCD, second framebuffer for 3D left
+ FramebufferTopRight1 = 0x1EF00494, // Main LCD, first framebuffer for 3D right
+ FramebufferTopRight2 = 0x1EF00498, // Main LCD, second framebuffer for 3D right
+ FramebufferSubLeft1 = 0x1EF00568, // Sub LCD, first framebuffer
+ FramebufferSubLeft2 = 0x1EF0056C, // Sub LCD, second framebuffer
+ FramebufferSubRight1 = 0x1EF00594, // Sub LCD, unused first framebuffer
+ FramebufferSubRight2 = 0x1EF00598, // Sub LCD, unused second framebuffer
+
+ CommandListSize = 0x1EF018E0,
+ CommandListAddress = 0x1EF018E8,
+ ProcessCommandList = 0x1EF018F0,
+ };
+
u32 framebuffer_top_left_1;
u32 framebuffer_top_left_2;
u32 framebuffer_top_right_1;
@@ -20,6 +35,10 @@ struct Registers {
u32 framebuffer_sub_left_2;
u32 framebuffer_sub_right_1;
u32 framebuffer_sub_right_2;
+
+ u32 command_list_size;
+ u32 command_list_address;
+ u32 command_processing_enabled;
};
extern Registers g_regs;
@@ -27,7 +46,7 @@ extern Registers g_regs;
enum {
TOP_ASPECT_X = 0x5,
TOP_ASPECT_Y = 0x3,
-
+
TOP_HEIGHT = 240,
TOP_WIDTH = 400,
BOTTOM_WIDTH = 320,
@@ -51,21 +70,10 @@ enum {
PADDR_VRAM_SUB_FRAME2 = 0x18249CF0,
};
-enum {
- REG_FRAMEBUFFER_TOP_LEFT_1 = 0x1EF00468, // Main LCD, first framebuffer for 3D left
- REG_FRAMEBUFFER_TOP_LEFT_2 = 0x1EF0046C, // Main LCD, second framebuffer for 3D left
- REG_FRAMEBUFFER_TOP_RIGHT_1 = 0x1EF00494, // Main LCD, first framebuffer for 3D right
- REG_FRAMEBUFFER_TOP_RIGHT_2 = 0x1EF00498, // Main LCD, second framebuffer for 3D right
- REG_FRAMEBUFFER_SUB_LEFT_1 = 0x1EF00568, // Sub LCD, first framebuffer
- REG_FRAMEBUFFER_SUB_LEFT_2 = 0x1EF0056C, // Sub LCD, second framebuffer
- REG_FRAMEBUFFER_SUB_RIGHT_1 = 0x1EF00594, // Sub LCD, unused first framebuffer
- REG_FRAMEBUFFER_SUB_RIGHT_2 = 0x1EF00598, // Sub LCD, unused second framebuffer
-};
-
/// Framebuffer location
enum FramebufferLocation {
FRAMEBUFFER_LOCATION_UNKNOWN, ///< Framebuffer location is unknown
- FRAMEBUFFER_LOCATION_FCRAM, ///< Framebuffer is in the GSP heap
+ FRAMEBUFFER_LOCATION_FCRAM, ///< Framebuffer is in the GSP heap
FRAMEBUFFER_LOCATION_VRAM, ///< Framebuffer is in VRAM
};
diff --git a/src/core/hw/hw.cpp b/src/core/hw/hw.cpp
index 85669ae7..ed70486e 100644
--- a/src/core/hw/hw.cpp
+++ b/src/core/hw/hw.cpp
@@ -6,7 +6,7 @@
#include "common/log.h"
#include "core/hw/hw.h"
-#include "core/hw/lcd.h"
+#include "core/hw/gpu.h"
#include "core/hw/ndma.h"
namespace HW {
@@ -34,7 +34,7 @@ enum {
VADDR_CDMA = 0xFFFDA000, // CoreLink DMA-330? Info
VADDR_DSP_2 = 0x1ED03000,
VADDR_HASH_2 = 0x1EE01000,
- VADDR_LCD = 0x1EF00000,
+ VADDR_GPU = 0x1EF00000,
};
template <typename T>
@@ -46,8 +46,8 @@ inline void Read(T &var, const u32 addr) {
// NDMA::Read(var, addr);
// break;
- case VADDR_LCD:
- LCD::Read(var, addr);
+ case VADDR_GPU:
+ GPU::Read(var, addr);
break;
default:
@@ -64,8 +64,8 @@ inline void Write(u32 addr, const T data) {
// NDMA::Write(addr, data);
// break;
- case VADDR_LCD:
- LCD::Write(addr, data);
+ case VADDR_GPU:
+ GPU::Write(addr, data);
break;
default:
@@ -87,13 +87,13 @@ template void Write<u8>(u32 addr, const u8 data);
/// Update hardware
void Update() {
- LCD::Update();
+ GPU::Update();
NDMA::Update();
}
/// Initialize hardware
void Init() {
- LCD::Init();
+ GPU::Init();
NDMA::Init();
NOTICE_LOG(HW, "initialized OK");
}
diff --git a/src/core/hw/ndma.cpp b/src/core/hw/ndma.cpp
index 52e459eb..f6aa72d1 100644
--- a/src/core/hw/ndma.cpp
+++ b/src/core/hw/ndma.cpp
@@ -37,12 +37,12 @@ void Update() {
/// Initialize hardware
void Init() {
- NOTICE_LOG(LCD, "initialized OK");
+ NOTICE_LOG(GPU, "initialized OK");
}
/// Shutdown hardware
void Shutdown() {
- NOTICE_LOG(LCD, "shutdown OK");
+ NOTICE_LOG(GPU, "shutdown OK");
}
} // namespace
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-17 16:57:02 +0000