diff options
Diffstat (limited to 'src/core/arm/dyncom/arm_dyncom_thumb.cpp')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_thumb.cpp | 102 |
1 files changed, 71 insertions, 31 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_thumb.cpp b/src/core/arm/dyncom/arm_dyncom_thumb.cpp index 08b5c0b7..3e79c44c 100644 --- a/src/core/arm/dyncom/arm_dyncom_thumb.cpp +++ b/src/core/arm/dyncom/arm_dyncom_thumb.cpp @@ -184,38 +184,27 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) { case 9: // LDR Rd,[PC,#imm8] *ainstr = 0xE59F0000 // base | ((tinstr & 0x0700) << (12 - 8)) // Rd - |((tinstr & 0x00FF) << (2 - 0)); // off8 + |((tinstr & 0x00FF) << (2 - 0)); // off8 break; case 10: case 11: - // TODO: Format 7 and Format 8 perform the same ARM encoding, so the following could be - // merged into a single subset, saving on the following boolean: - - if ((tinstr & (1 << 9)) == 0) { - static const ARMword subset[4] = { - 0xE7800000, // STR Rd,[Rb,Ro] - 0xE7C00000, // STRB Rd,[Rb,Ro] - 0xE7900000, // LDR Rd,[Rb,Ro] - 0xE7D00000 // LDRB Rd,[Rb,Ro] - }; - - *ainstr = subset[(tinstr & 0x0C00) >> 10] // base - |((tinstr & 0x0007) << (12 - 0)) // Rd - |((tinstr & 0x0038) << (16 - 3)) // Rb - |((tinstr & 0x01C0) >> 6); // Ro - - } else { - static const ARMword subset[4] = { + { + static const ARMword subset[8] = { + 0xE7800000, // STR Rd,[Rb,Ro] 0xE18000B0, // STRH Rd,[Rb,Ro] + 0xE7C00000, // STRB Rd,[Rb,Ro] 0xE19000D0, // LDRSB Rd,[Rb,Ro] + 0xE7900000, // LDR Rd,[Rb,Ro] 0xE19000B0, // LDRH Rd,[Rb,Ro] + 0xE7D00000, // LDRB Rd,[Rb,Ro] 0xE19000F0 // LDRSH Rd,[Rb,Ro] }; - *ainstr = subset[(tinstr & 0x0C00) >> 10] // base - |((tinstr & 0x0007) << (12 - 0)) // Rd - |((tinstr & 0x0038) << (16 - 3)) // Rb - |((tinstr & 0x01C0) >> 6); // Ro + + *ainstr = subset[(tinstr & 0xE00) >> 9] // base + |((tinstr & 0x0007) << (12 - 0)) // Rd + |((tinstr & 0x0038) << (16 - 3)) // Rb + |((tinstr & 0x01C0) >> 6); // Ro } break; @@ -285,9 +274,46 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) { ? 0xE24DDF00 // SUB : 0xE28DDF00) // ADD |(tinstr & 0x007F); // off7 - } else if ((tinstr & 0x0F00) == 0x0e00) - *ainstr = 0xEF000000 | 0x180000; // base | BKPT mask - else { + } else if ((tinstr & 0x0F00) == 0x0e00) { + // BKPT + *ainstr = 0xEF000000 // base + | BITS(tinstr, 0, 3) // imm4 field; + | (BITS(tinstr, 4, 7) << 8); // beginning 4 bits of imm12 + } else if ((tinstr & 0x0F00) == 0x0200) { + static const ARMword subset[4] = { + 0xE6BF0070, // SXTH + 0xE6AF0070, // SXTB + 0xE6FF0070, // UXTH + 0xE6EF0070, // UXTB + }; + + *ainstr = subset[BITS(tinstr, 6, 7)] // base + | (BITS(tinstr, 0, 2) << 12) // Rd + | BITS(tinstr, 3, 5); // Rm + } else if ((tinstr & 0x0F00) == 0x600) { + if (BIT(tinstr, 5) == 0) { + // SETEND + *ainstr = 0xF1010000 // base + | (BIT(tinstr, 3) << 9); // endian specifier + } else { + // CPS + *ainstr = 0xF1080000 // base + | (BIT(tinstr, 0) << 6) // fiq bit + | (BIT(tinstr, 1) << 7) // irq bit + | (BIT(tinstr, 2) << 8) // abort bit + | (BIT(tinstr, 4) << 18); // enable bit + } + } else if ((tinstr & 0x0F00) == 0x0a00) { + static const ARMword subset[3] = { + 0xE6BF0F30, // REV + 0xE6BF0FB0, // REV16 + 0xE6FF0FB0, // REVSH + }; + + *ainstr = subset[BITS(tinstr, 6, 7)] // base + | (BITS(tinstr, 0, 2) << 12) // Rd + | BITS(tinstr, 3, 5); // Rm + } else { static const ARMword subset[4] = { 0xE92D0000, // STMDB sp!,{rlist} 0xE92D4000, // STMDB sp!,{rlist,lr} @@ -301,11 +327,25 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) { case 24: // STMIA case 25: // LDMIA - *ainstr = ((tinstr & (1 << 11)) // base - ? 0xE8B00000 // LDMIA - : 0xE8A00000) // STMIA - |((tinstr & 0x0700) << (16 - 8)) // Rb - |(tinstr & 0x00FF); // mask8 + if (tinstr & (1 << 11)) + { + unsigned int base = 0xE8900000; + unsigned int rn = BITS(tinstr, 8, 10); + + // Writeback + if ((tinstr & (1 << rn)) == 0) + base |= (1 << 21); + + *ainstr = base // base (LDMIA) + | (rn << 16) // Rn + | (tinstr & 0x00FF); // Register list + } + else + { + *ainstr = 0xE8A00000 // base (STMIA) + | (BITS(tinstr, 8, 10) << 16) // Rn + | (tinstr & 0x00FF); // Register list + } break; case 26: // Bcc |