diff options
36 files changed, 530 insertions, 515 deletions
diff --git a/src/common/string_util.cpp b/src/common/string_util.cpp index b3b772bd..3264dd51 100644 --- a/src/common/string_util.cpp +++ b/src/common/string_util.cpp @@ -426,7 +426,7 @@ std::u16string UTF8ToUTF16(const std::string& input) static std::string UTF16ToUTF8(const std::wstring& input) { - auto const size = WideCharToMultiByte(CP_UTF8, 0, input.data(), input.size(), nullptr, 0, nullptr, nullptr); + auto const size = WideCharToMultiByte(CP_UTF8, 0, input.data(), static_cast<int>(input.size()), nullptr, 0, nullptr, nullptr); std::string output; output.resize(size); @@ -439,12 +439,12 @@ static std::string UTF16ToUTF8(const std::wstring& input) static std::wstring CPToUTF16(u32 code_page, const std::string& input) { - auto const size = MultiByteToWideChar(code_page, 0, input.data(), input.size(), nullptr, 0); + auto const size = MultiByteToWideChar(code_page, 0, input.data(), static_cast<int>(input.size()), nullptr, 0); std::wstring output; output.resize(size); - if (size == 0 || size != MultiByteToWideChar(code_page, 0, input.data(), input.size(), &output[0], output.size())) + if (size == 0 || size != MultiByteToWideChar(code_page, 0, input.data(), static_cast<int>(input.size()), &output[0], static_cast<int>(output.size()))) output.clear(); return output; diff --git a/src/core/arm/dyncom/arm_dyncom_dec.cpp b/src/core/arm/dyncom/arm_dyncom_dec.cpp index 0927eece..9f3b90fd 100644 --- a/src/core/arm/dyncom/arm_dyncom_dec.cpp +++ b/src/core/arm/dyncom/arm_dyncom_dec.cpp @@ -2,7 +2,6 @@ // Licensed under GPLv2 or any later version // Refer to the license.txt file included. -#include "core/arm/skyeye_common/arm_regformat.h" #include "core/arm/skyeye_common/armdefs.h" #include "core/arm/dyncom/arm_dyncom_dec.h" @@ -43,7 +42,7 @@ const ISEITEM arm_instruction[] = { { "srs", 4, 6, 25, 31, 0x0000007c, 22, 22, 0x00000001, 16, 20, 0x0000000d, 8, 11, 0x00000005 }, { "rfe", 4, 6, 25, 31, 0x0000007c, 22, 22, 0x00000000, 20, 20, 0x00000001, 8, 11, 0x0000000a }, - { "bkpt", 2, 3, 20, 31, 0x00000e12, 4, 7, 0x00000007 }, + { "bkpt", 2, 3, 20, 27, 0x00000012, 4, 7, 0x00000007 }, { "blx", 1, 3, 25, 31, 0x0000007d }, { "cps", 3, 6, 20, 31, 0x00000f10, 16, 16, 0x00000000, 5, 5, 0x00000000 }, { "pld", 4, 4, 26, 31, 0x0000003d, 24, 24, 0x00000001, 20, 22, 0x00000005, 12, 15, 0x0000000f }, diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 17944c0a..b691ffbc 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -5,23 +5,20 @@ #define CITRA_IGNORE_EXIT(x) #include <algorithm> -#include <unordered_map> -#include <stdio.h> -#include <assert.h> #include <cstdio> -#include <vector> +#include <unordered_map> -using namespace std; +#include "common/logging/log.h" +#include "core/mem_map.h" +#include "core/hle/hle.h" +#include "core/arm/disassembler/arm_disasm.h" +#include "core/arm/dyncom/arm_dyncom_interpreter.h" +#include "core/arm/dyncom/arm_dyncom_thumb.h" +#include "core/arm/dyncom/arm_dyncom_run.h" #include "core/arm/skyeye_common/armdefs.h" #include "core/arm/skyeye_common/armmmu.h" -#include "arm_dyncom_thumb.h" -#include "arm_dyncom_run.h" #include "core/arm/skyeye_common/vfp/vfp.h" -#include "core/arm/disassembler/arm_disasm.h" - -#include "core/mem_map.h" -#include "core/hle/hle.h" enum { COND = (1 << 0), @@ -44,8 +41,7 @@ enum { #define ROTATE_RIGHT_32(n, i) ROTATE_RIGHT(n, i, 32) #define ROTATE_LEFT_32(n, i) ROTATE_LEFT(n, i, 32) -typedef arm_core_t arm_processor; -typedef unsigned int (*shtop_fp_t)(arm_processor *cpu, unsigned int sht_oper); +typedef unsigned int (*shtop_fp_t)(ARMul_State* cpu, unsigned int sht_oper); // Defines a reservation granule of 2 words, which protects the first 2 words starting at the tag. // This is the smallest granule allowed by the v7 spec, and is coincidentally just large enough to @@ -53,7 +49,7 @@ typedef unsigned int (*shtop_fp_t)(arm_processor *cpu, unsigned int sht_oper); static const ARMword RESERVATION_GRANULE_MASK = 0xFFFFFFF8; // Exclusive memory access -static int exclusive_detect(ARMul_State* state, ARMword addr){ +static int exclusive_detect(ARMul_State* state, ARMword addr) { if(state->exclusive_tag == (addr & RESERVATION_GRANULE_MASK)) return 0; else @@ -69,7 +65,7 @@ static void remove_exclusive(ARMul_State* state, ARMword addr){ state->exclusive_tag = 0xFFFFFFFF; } -unsigned int DPO(Immediate)(arm_processor *cpu, unsigned int sht_oper) { +static unsigned int DPO(Immediate)(ARMul_State* cpu, unsigned int sht_oper) { unsigned int immed_8 = BITS(sht_oper, 0, 7); unsigned int rotate_imm = BITS(sht_oper, 8, 11); unsigned int shifter_operand = ROTATE_RIGHT_32(immed_8, rotate_imm * 2); @@ -80,14 +76,14 @@ unsigned int DPO(Immediate)(arm_processor *cpu, unsigned int sht_oper) { return shifter_operand; } -unsigned int DPO(Register)(arm_processor *cpu, unsigned int sht_oper) { +static unsigned int DPO(Register)(ARMul_State* cpu, unsigned int sht_oper) { unsigned int rm = CHECK_READ_REG15(cpu, RM); unsigned int shifter_operand = rm; cpu->shifter_carry_out = cpu->CFlag; return shifter_operand; } -unsigned int DPO(LogicalShiftLeftByImmediate)(arm_processor *cpu, unsigned int sht_oper) { +static unsigned int DPO(LogicalShiftLeftByImmediate)(ARMul_State* cpu, unsigned int sht_oper) { int shift_imm = BITS(sht_oper, 7, 11); unsigned int rm = CHECK_READ_REG15(cpu, RM); unsigned int shifter_operand; @@ -101,7 +97,7 @@ unsigned int DPO(LogicalShiftLeftByImmediate)(arm_processor *cpu, unsigned int s return shifter_operand; } -unsigned int DPO(LogicalShiftLeftByRegister)(arm_processor *cpu, unsigned int sht_oper) { +static unsigned int DPO(LogicalShiftLeftByRegister)(ARMul_State* cpu, unsigned int sht_oper) { int shifter_operand; unsigned int rm = CHECK_READ_REG15(cpu, RM); unsigned int rs = CHECK_READ_REG15(cpu, RS); @@ -121,7 +117,7 @@ unsigned int DPO(LogicalShiftLeftByRegister)(arm_processor *cpu, unsigned int sh return shifter_operand; } -unsigned int DPO(LogicalShiftRightByImmediate)(arm_processor *cpu, unsigned int sht_oper) { +static unsigned int DPO(LogicalShiftRightByImmediate)(ARMul_State* cpu, unsigned int sht_oper) { unsigned int rm = CHECK_READ_REG15(cpu, RM); unsigned int shifter_operand; int shift_imm = BITS(sht_oper, 7, 11); @@ -135,7 +131,7 @@ unsigned int DPO(LogicalShiftRightByImmediate)(arm_processor *cpu, unsigned int return shifter_operand; } -unsigned int DPO(LogicalShiftRightByRegister)(arm_processor *cpu, unsigned int sht_oper) { +static unsigned int DPO(LogicalShiftRightByRegister)(ARMul_State* cpu, unsigned int sht_oper) { unsigned int rs = CHECK_READ_REG15(cpu, RS); unsigned int rm = CHECK_READ_REG15(cpu, RM); unsigned int shifter_operand; @@ -155,7 +151,7 @@ unsigned int DPO(LogicalShiftRightByRegister)(arm_processor *cpu, unsigned int s return shifter_operand; } -unsigned int DPO(ArithmeticShiftRightByImmediate)(arm_processor *cpu, unsigned int sht_oper) { +static unsigned int DPO(ArithmeticShiftRightByImmediate)(ARMul_State* cpu, unsigned int sht_oper) { unsigned int rm = CHECK_READ_REG15(cpu, RM); unsigned int shifter_operand; int shift_imm = BITS(sht_oper, 7, 11); @@ -172,7 +168,7 @@ unsigned int DPO(ArithmeticShiftRightByImmediate)(arm_processor *cpu, unsigned i return shifter_operand; } -unsigned int DPO(ArithmeticShiftRightByRegister)(arm_processor *cpu, unsigned int sht_oper) { +static unsigned int DPO(ArithmeticShiftRightByRegister)(ARMul_State* cpu, unsigned int sht_oper) { unsigned int rs = CHECK_READ_REG15(cpu, RS); unsigned int rm = CHECK_READ_REG15(cpu, RM); unsigned int shifter_operand; @@ -192,7 +188,7 @@ unsigned int DPO(ArithmeticShiftRightByRegister)(arm_processor *cpu, unsigned in return shifter_operand; } -unsigned int DPO(RotateRightByImmediate)(arm_processor *cpu, unsigned int sht_oper) { +static unsigned int DPO(RotateRightByImmediate)(ARMul_State* cpu, unsigned int sht_oper) { unsigned int shifter_operand; unsigned int rm = CHECK_READ_REG15(cpu, RM); int shift_imm = BITS(sht_oper, 7, 11); @@ -206,7 +202,7 @@ unsigned int DPO(RotateRightByImmediate)(arm_processor *cpu, unsigned int sht_op return shifter_operand; } -unsigned int DPO(RotateRightByRegister)(arm_processor *cpu, unsigned int sht_oper) { +static unsigned int DPO(RotateRightByRegister)(ARMul_State* cpu, unsigned int sht_oper) { unsigned int rm = CHECK_READ_REG15(cpu, RM); unsigned int rs = CHECK_READ_REG15(cpu, RS); unsigned int shifter_operand; @@ -223,7 +219,7 @@ unsigned int DPO(RotateRightByRegister)(arm_processor *cpu, unsigned int sht_ope return shifter_operand; } -typedef void (*get_addr_fp_t)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw); +typedef void (*get_addr_fp_t)(ARMul_State *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw); typedef struct _ldst_inst { unsigned int inst; @@ -231,7 +227,7 @@ typedef struct _ldst_inst { } ldst_inst; #define DEBUG_MSG LOG_DEBUG(Core_ARM11, "inst is %x", inst); CITRA_IGNORE_EXIT(0) -int CondPassed(arm_processor *cpu, unsigned int cond); +int CondPassed(ARMul_State* cpu, unsigned int cond); #define LnSWoUB(s) glue(LnSWoUB, s) #define MLnS(s) glue(MLnS, s) @@ -243,7 +239,7 @@ int CondPassed(arm_processor *cpu, unsigned int cond); #define P_BIT BIT(inst, 24) #define OFFSET_12 BITS(inst, 0, 11) -void LnSWoUB(ImmediateOffset)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void LnSWoUB(ImmediateOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int Rn = BITS(inst, 16, 19); unsigned int addr; @@ -255,7 +251,7 @@ void LnSWoUB(ImmediateOffset)(arm_processor *cpu, unsigned int inst, unsigned in virt_addr = addr; } -void LnSWoUB(RegisterOffset)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void LnSWoUB(RegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int Rn = BITS(inst, 16, 19); unsigned int Rm = BITS(inst, 0, 3); unsigned int rn = CHECK_READ_REG15_WA(cpu, Rn); @@ -270,7 +266,7 @@ void LnSWoUB(RegisterOffset)(arm_processor *cpu, unsigned int inst, unsigned int virt_addr = addr; } -void LnSWoUB(ImmediatePostIndexed)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void LnSWoUB(ImmediatePostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int Rn = BITS(inst, 16, 19); unsigned int addr = CHECK_READ_REG15_WA(cpu, Rn); @@ -282,7 +278,7 @@ void LnSWoUB(ImmediatePostIndexed)(arm_processor *cpu, unsigned int inst, unsign virt_addr = addr; } -void LnSWoUB(ImmediatePreIndexed)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void LnSWoUB(ImmediatePreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int Rn = BITS(inst, 16, 19); unsigned int addr; @@ -297,7 +293,7 @@ void LnSWoUB(ImmediatePreIndexed)(arm_processor *cpu, unsigned int inst, unsigne cpu->Reg[Rn] = addr; } -void MLnS(RegisterPreIndexed)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void MLnS(RegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int addr; unsigned int Rn = BITS(inst, 16, 19); unsigned int Rm = BITS(inst, 0, 3); @@ -315,7 +311,7 @@ void MLnS(RegisterPreIndexed)(arm_processor *cpu, unsigned int inst, unsigned in cpu->Reg[Rn] = addr; } -void LnSWoUB(RegisterPreIndexed)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void LnSWoUB(RegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int Rn = BITS(inst, 16, 19); unsigned int Rm = BITS(inst, 0, 3); unsigned int rn = CHECK_READ_REG15_WA(cpu, Rn); @@ -334,7 +330,7 @@ void LnSWoUB(RegisterPreIndexed)(arm_processor *cpu, unsigned int inst, unsigned } } -void LnSWoUB(ScaledRegisterPreIndexed)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void LnSWoUB(ScaledRegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int shift = BITS(inst, 5, 6); unsigned int shift_imm = BITS(inst, 7, 11); unsigned int Rn = BITS(inst, 16, 19); @@ -385,7 +381,7 @@ void LnSWoUB(ScaledRegisterPreIndexed)(arm_processor *cpu, unsigned int inst, un cpu->Reg[Rn] = addr; } -void LnSWoUB(ScaledRegisterPostIndexed)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void LnSWoUB(ScaledRegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int shift = BITS(inst, 5, 6); unsigned int shift_imm = BITS(inst, 7, 11); unsigned int Rn = BITS(inst, 16, 19); @@ -434,7 +430,7 @@ void LnSWoUB(ScaledRegisterPostIndexed)(arm_processor *cpu, unsigned int inst, u } } -void LnSWoUB(RegisterPostIndexed)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void LnSWoUB(RegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int Rn = BITS(inst, 16, 19); unsigned int Rm = BITS(inst, 0, 3); unsigned int rm = CHECK_READ_REG15_WA(cpu, Rm); @@ -450,7 +446,7 @@ void LnSWoUB(RegisterPostIndexed)(arm_processor *cpu, unsigned int inst, unsigne } } -void MLnS(ImmediateOffset)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void MLnS(ImmediateOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int immedL = BITS(inst, 0, 3); unsigned int immedH = BITS(inst, 8, 11); unsigned int Rn = BITS(inst, 16, 19); @@ -466,7 +462,7 @@ void MLnS(ImmediateOffset)(arm_processor *cpu, unsigned int inst, unsigned int & virt_addr = addr; } -void MLnS(RegisterOffset)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void MLnS(RegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int addr; unsigned int Rn = BITS(inst, 16, 19); unsigned int Rm = BITS(inst, 0, 3); @@ -481,7 +477,7 @@ void MLnS(RegisterOffset)(arm_processor *cpu, unsigned int inst, unsigned int &v virt_addr = addr; } -void MLnS(ImmediatePreIndexed)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void MLnS(ImmediatePreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int Rn = BITS(inst, 16, 19); unsigned int immedH = BITS(inst, 8, 11); unsigned int immedL = BITS(inst, 0, 3); @@ -500,7 +496,7 @@ void MLnS(ImmediatePreIndexed)(arm_processor *cpu, unsigned int inst, unsigned i cpu->Reg[Rn] = addr; } -void MLnS(ImmediatePostIndexed)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void MLnS(ImmediatePostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int Rn = BITS(inst, 16, 19); unsigned int immedH = BITS(inst, 8, 11); unsigned int immedL = BITS(inst, 0, 3); @@ -519,7 +515,7 @@ void MLnS(ImmediatePostIndexed)(arm_processor *cpu, unsigned int inst, unsigned } } -void MLnS(RegisterPostIndexed)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void MLnS(RegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int Rn = BITS(inst, 16, 19); unsigned int Rm = BITS(inst, 0, 3); unsigned int rm = CHECK_READ_REG15_WA(cpu, Rm); @@ -534,7 +530,7 @@ void MLnS(RegisterPostIndexed)(arm_processor *cpu, unsigned int inst, unsigned i } } -void LdnStM(DecrementBefore)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void LdnStM(DecrementBefore)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int Rn = BITS(inst, 16, 19); unsigned int i = BITS(inst, 0, 15); int count = 0; @@ -550,7 +546,7 @@ void LdnStM(DecrementBefore)(arm_processor *cpu, unsigned int inst, unsigned int cpu->Reg[Rn] -= count * 4; } -void LdnStM(IncrementBefore)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void LdnStM(IncrementBefore)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int Rn = BITS(inst, 16, 19); unsigned int i = BITS(inst, 0, 15); int count = 0; @@ -566,7 +562,7 @@ void LdnStM(IncrementBefore)(arm_processor *cpu, unsigned int inst, unsigned int cpu->Reg[Rn] += count * 4; } -void LdnStM(IncrementAfter)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void LdnStM(IncrementAfter)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int Rn = BITS(inst, 16, 19); unsigned int i = BITS(inst, 0, 15); int count = 0; @@ -582,7 +578,7 @@ void LdnStM(IncrementAfter)(arm_processor *cpu, unsigned int inst, unsigned int cpu->Reg[Rn] += count * 4; } -void LdnStM(DecrementAfter)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void LdnStM(DecrementAfter)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int Rn = BITS(inst, 16, 19); unsigned int i = BITS(inst, 0, 15); int count = 0; @@ -600,7 +596,7 @@ void LdnStM(DecrementAfter)(arm_processor *cpu, unsigned int inst, unsigned int } } -void LnSWoUB(ScaledRegisterOffset)(arm_processor *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw) { +static void LnSWoUB(ScaledRegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { unsigned int shift = BITS(inst, 5, 6); unsigned int shift_imm = BITS(inst, 7, 11); unsigned int Rn = BITS(inst, 16, 19); @@ -796,6 +792,7 @@ typedef struct _stm_inst { } stm_inst; struct bkpt_inst { + u32 imm; }; struct blx1_inst { @@ -1115,7 +1112,7 @@ inline void *AllocBuffer(unsigned int size) { return (void *)&inst_buf[start]; } -int CondPassed(arm_processor *cpu, unsigned int cond) { +int CondPassed(ARMul_State* cpu, unsigned int cond) { #define NFLAG cpu->NFlag #define ZFLAG cpu->ZFlag #define CFLAG cpu->CFlag @@ -1183,7 +1180,7 @@ enum DECODE_STATUS { int decode_arm_instr(uint32_t instr, int32_t *idx); -shtop_fp_t get_shtop(unsigned int inst) { +static shtop_fp_t get_shtop(unsigned int inst) { if (BIT(inst, 25)) { return DPO(Immediate); } else if (BITS(inst, 4, 11) == 0) { @@ -1208,7 +1205,7 @@ shtop_fp_t get_shtop(unsigned int inst) { return nullptr; } -get_addr_fp_t get_calc_addr_op(unsigned int inst) { +static get_addr_fp_t get_calc_addr_op(unsigned int inst) { if (BITS(inst, 24, 27) == 5 && BIT(inst, 21) == 0) { return LnSWoUB(ImmediateOffset); } else if (BITS(inst, 24, 27) == 7 && BIT(inst, 21) == 0 && BITS(inst, 4, 11) == 0) { @@ -1262,7 +1259,7 @@ get_addr_fp_t get_calc_addr_op(unsigned int inst) { CITRA_IGNORE_EXIT(-1); \ return nullptr; -ARM_INST_PTR INTERPRETER_TRANSLATE(adc)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(adc)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(adc_inst)); adc_inst *inst_cream = (adc_inst *)inst_base->component; @@ -1285,7 +1282,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(adc)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(add)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(add)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(add_inst)); add_inst *inst_cream = (add_inst *)inst_base->component; @@ -1308,7 +1305,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(add)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(and)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(and)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(and_inst)); and_inst *inst_cream = (and_inst *)inst_base->component; @@ -1330,7 +1327,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(and)(unsigned int inst, int index) inst_base->br = INDIRECT_BRANCH; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(bbl)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(bbl)(unsigned int inst, int index) { #define POSBRANCH ((inst & 0x7fffff) << 2) #define NEGBRANCH ((0xff000000 |(inst & 0xffffff)) << 2) @@ -1352,7 +1349,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(bbl)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(bic)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(bic)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bic_inst)); bic_inst *inst_cream = (bic_inst *)inst_base->component; @@ -1375,8 +1372,23 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(bic)(unsigned int inst, int index) inst_base->br = INDIRECT_BRANCH; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(bkpt)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("BKPT"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(blx)(unsigned int inst, int index) + +static ARM_INST_PTR INTERPRETER_TRANSLATE(bkpt)(unsigned int inst, int index) +{ + arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(bkpt_inst)); + bkpt_inst* const inst_cream = (bkpt_inst*)inst_base->component; + + inst_base->cond = BITS(inst, 28, 31); + inst_base->idx = index; + inst_base->br = NON_BRANCH; + inst_base->load_r15 = 0; + + inst_cream->imm = BITS(inst, 8, 19) | BITS(inst, 0, 3); + + return inst_base; +} + +static ARM_INST_PTR INTERPRETER_TRANSLATE(blx)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(blx_inst)); blx_inst *inst_cream = (blx_inst *)inst_base->component; @@ -1394,7 +1406,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(blx)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(bx)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(bx)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bx_inst)); bx_inst *inst_cream = (bx_inst *)inst_base->component; @@ -1407,12 +1419,12 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(bx)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(bxj)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(bxj)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(bx)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(cdp)(unsigned int inst, int index){ +static ARM_INST_PTR INTERPRETER_TRANSLATE(cdp)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cdp_inst)); cdp_inst *inst_cream = (cdp_inst *)inst_base->component; @@ -1432,7 +1444,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(cdp)(unsigned int inst, int index){ LOG_TRACE(Core_ARM11, "inst %x index %x", inst, index); return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(clrex)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(clrex)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(clrex_inst)); inst_base->cond = BITS(inst, 28, 31); @@ -1441,7 +1453,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(clrex)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(clz)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(clz)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(clz_inst)); clz_inst *inst_cream = (clz_inst *)inst_base->component; @@ -1458,7 +1470,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(clz)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(cmn)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(cmn)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cmn_inst)); cmn_inst *inst_cream = (cmn_inst *)inst_base->component; @@ -1477,7 +1489,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(cmn)(unsigned int inst, int index) inst_cream->shtop_func = get_shtop(inst); return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(cmp)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(cmp)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cmp_inst)); cmp_inst *inst_cream = (cmp_inst *)inst_base->component; @@ -1495,7 +1507,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(cmp)(unsigned int inst, int index) inst_cream->shtop_func = get_shtop(inst); return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(cps)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(cps)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cps_inst)); cps_inst *inst_cream = (cps_inst *)inst_base->component; @@ -1514,7 +1526,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(cps)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(cpy)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(cpy)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mov_inst)); mov_inst *inst_cream = (mov_inst *)inst_base->component; @@ -1534,7 +1546,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(cpy)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(eor)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(eor)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(eor_inst)); eor_inst *inst_cream = (eor_inst *)inst_base->component; @@ -1557,7 +1569,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(eor)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(ldc)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ldc)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldc_inst)); inst_base->cond = BITS(inst, 28, 31); @@ -1566,7 +1578,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(ldc)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(ldm)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ldm)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); ldst_inst *inst_cream = (ldst_inst *)inst_base->component; @@ -1583,7 +1595,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(ldm)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(sxth)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(sxth)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtb_inst)); sxtb_inst *inst_cream = (sxtb_inst *)inst_base->component; @@ -1601,7 +1613,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(sxth)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(ldr)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ldr)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); ldst_inst *inst_cream = (ldst_inst *)inst_base->component; @@ -1620,7 +1632,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(ldr)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(ldrcond)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrcond)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); ldst_inst *inst_cream = (ldst_inst *)inst_base->component; @@ -1639,7 +1651,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(ldrcond)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(uxth)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uxth)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxth_inst)); uxth_inst *inst_cream = (uxth_inst *)inst_base->component; @@ -1657,7 +1669,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(uxth)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(uxtah)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtah)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxtah_inst)); uxtah_inst *inst_cream = (uxtah_inst *)inst_base->component; @@ -1676,7 +1688,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(uxtah)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(ldrb)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrb)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); ldst_inst *inst_cream = (ldst_inst *)inst_base->component; @@ -1693,7 +1705,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(ldrb)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(ldrbt)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrbt)(unsigned int inst, int index) { arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); ldst_inst* inst_cream = (ldst_inst*)inst_base->component; @@ -1716,7 +1728,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(ldrbt)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(ldrd)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrd)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); ldst_inst *inst_cream = (ldst_inst *)inst_base->component; @@ -1730,7 +1742,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(ldrd)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(ldrex)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrex)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); generic_arm_inst *inst_cream = (generic_arm_inst *)inst_base->component; @@ -1744,19 +1756,19 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(ldrex)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexb)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexb)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(ldrex)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexh)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexh)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(ldrex)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexd)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexd)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(ldrex)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(ldrh)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrh)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); ldst_inst *inst_cream = (ldst_inst *)inst_base->component; @@ -1773,7 +1785,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(ldrh)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(ldrsb)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrsb)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); ldst_inst *inst_cream = (ldst_inst *)inst_base->component; @@ -1790,7 +1802,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(ldrsb)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(ldrsh)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrsh)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); ldst_inst *inst_cream = (ldst_inst *)inst_base->component; @@ -1807,7 +1819,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(ldrsh)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(ldrt)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrt)(unsigned int inst, int index) { arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); ldst_inst* inst_cream = (ldst_inst*)inst_base->component; @@ -1835,7 +1847,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(ldrt)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(mcr)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(mcr)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mcr_inst)); mcr_inst *inst_cream = (mcr_inst *)inst_base->component; @@ -1852,8 +1864,8 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(mcr)(unsigned int inst, int index) inst_cream->inst = inst; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(mcrr)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("MCRR"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(mla)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(mcrr)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("MCRR"); } +static ARM_INST_PTR INTERPRETER_TRANSLATE(mla)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mla_inst)); mla_inst *inst_cream = (mla_inst *)inst_base->component; @@ -1874,7 +1886,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(mla)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(mov)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(mov)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mov_inst)); mov_inst *inst_cream = (mov_inst *)inst_base->component; @@ -1894,7 +1906,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(mov)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(mrc)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(mrc)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mrc_inst)); mrc_inst *inst_cream = (mrc_inst *)inst_base->component; @@ -1911,8 +1923,8 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(mrc)(unsigned int inst, int index) inst_cream->inst = inst; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(mrrc)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("MRRC"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(mrs)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(mrrc)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("MRRC"); } +static ARM_INST_PTR INTERPRETER_TRANSLATE(mrs)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mrs_inst)); mrs_inst *inst_cream = (mrs_inst *)inst_base->component; @@ -1926,7 +1938,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(mrs)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(msr)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(msr)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(msr_inst)); msr_inst *inst_cream = (msr_inst *)inst_base->component; @@ -1941,7 +1953,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(msr)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(mul)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(mul)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mul_inst)); mul_inst *inst_cream = (mul_inst *)inst_base->component; @@ -1960,7 +1972,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(mul)(unsigned int inst, int index) inst_base->load_r15 = 1; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(mvn)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(mvn)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mvn_inst)); mvn_inst *inst_cream = (mvn_inst *)inst_base->component; @@ -1981,7 +1993,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(mvn)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(orr)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(orr)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(orr_inst)); orr_inst *inst_cream = (orr_inst *)inst_base->component; @@ -2006,7 +2018,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(orr)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(pkhbt)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(pkhbt)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(pkh_inst)); pkh_inst *inst_cream = (pkh_inst *)inst_base->component; @@ -2024,12 +2036,12 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(pkhbt)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(pkhtb)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(pkhtb)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(pkhbt)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(pld)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(pld)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(pld_inst)); @@ -2041,7 +2053,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(pld)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(qadd)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; @@ -2058,20 +2070,20 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(qadd)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(qdadd)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(qdadd)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(qadd)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(qdsub)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(qdsub)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(qadd)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(qsub)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(qsub)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(qadd)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(qadd8)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd8)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; @@ -2089,28 +2101,28 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(qadd8)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(qadd16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd16)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(qadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(qaddsubx)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(qaddsubx)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(qadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(qsub8)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(qsub8)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(qadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(qsub16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(qsub16)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(qadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(qsubaddx)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(qsubaddx)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(qadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(rev)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(rev)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(rev_inst)); rev_inst* const inst_cream = (rev_inst*)inst_base->component; @@ -2127,17 +2139,17 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(rev)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(rev16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(rev16)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(rev)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(revsh)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(revsh)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(rev)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(rfe)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("RFE"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(rsb)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(rfe)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("RFE"); } +static ARM_INST_PTR INTERPRETER_TRANSLATE(rsb)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(rsb_inst)); rsb_inst *inst_cream = (rsb_inst *)inst_base->component; @@ -2161,7 +2173,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(rsb)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(rsc)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(rsc)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(rsc_inst)); rsc_inst *inst_cream = (rsc_inst *)inst_base->component; @@ -2185,7 +2197,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(rsc)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(sadd8)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(sadd8)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; @@ -2203,28 +2215,28 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(sadd8)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(sadd16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(sadd16)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(sadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(saddsubx)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(saddsubx)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(sadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(ssub8)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ssub8)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(sadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(ssub16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ssub16)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(sadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(ssubaddx)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ssubaddx)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(sadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(sbc)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(sbc)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sbc_inst)); sbc_inst *inst_cream = (sbc_inst *)inst_base->component; @@ -2248,7 +2260,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(sbc)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(sel)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(sel)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; @@ -2267,9 +2279,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(sel)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(setend)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SETEND"); } +static ARM_INST_PTR INTERPRETER_TRANSLATE(setend)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SETEND"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(shadd8)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(shadd8)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; @@ -2287,28 +2299,28 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(shadd8)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(shadd16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(shadd16)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(shadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(shaddsubx)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(shaddsubx)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(shadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(shsub8)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(shsub8)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(shadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(shsub16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(shsub16)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(shadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(shsubaddx)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(shsubaddx)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(shadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(smla)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(smla)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smla_inst)); smla_inst *inst_cream = (smla_inst *)inst_base->component; @@ -2328,7 +2340,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(smla)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(smlad)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(smlad)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst)); smlad_inst* const inst_cream = (smlad_inst*)inst_base->component; @@ -2348,20 +2360,20 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(smlad)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(smuad)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(smuad)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(smlad)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(smusd)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(smusd)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(smlad)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(smlsd)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(smlsd)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(smlad)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(smlal)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(smlal)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umlal_inst)); umlal_inst *inst_cream = (umlal_inst *)inst_base->component; @@ -2382,7 +2394,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(smlal)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(smlalxy)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(smlalxy)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlalxy_inst)); smlalxy_inst* const inst_cream = (smlalxy_inst*)inst_base->component; @@ -2402,7 +2414,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(smlalxy)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(smlaw)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(smlaw)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst)); smlad_inst* const inst_cream = (smlad_inst*)inst_base->component; @@ -2421,7 +2433,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(smlaw)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(smlald)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(smlald)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlald_inst)); smlald_inst* const inst_cream = (smlald_inst*)inst_base->component; @@ -2441,12 +2453,12 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(smlald)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(smlsld)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(smlsld)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(smlald)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(smmla)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(smmla)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst)); smlad_inst* const inst_cream = (smlad_inst*)inst_base->component; @@ -2466,16 +2478,16 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(smmla)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(smmls)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(smmls)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(smmla)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(smmul)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(smmul)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(smmla)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(smul)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(smul)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smul_inst)); smul_inst *inst_cream = (smul_inst *)inst_base->component; @@ -2497,7 +2509,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(smul)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(smull)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(smull)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umull_inst)); umull_inst *inst_cream = (umull_inst *)inst_base->component; @@ -2518,7 +2530,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(smull)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(smulw)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(smulw)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst)); smlad_inst *inst_cream = (smlad_inst *)inst_base->component; @@ -2537,8 +2549,8 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(smulw)(unsigned int inst, int index) inst_base->load_r15 = 1; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(srs)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SRS"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(ssat)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(srs)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SRS"); } +static ARM_INST_PTR INTERPRETER_TRANSLATE(ssat)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ssat_inst)); ssat_inst* const inst_cream = (ssat_inst*)inst_base->component; @@ -2556,7 +2568,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(ssat)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(ssat16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(ssat16)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ssat_inst)); ssat_inst* const inst_cream = (ssat_inst*)inst_base->component; @@ -2573,7 +2585,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(ssat16)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(stc)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(stc)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(stc_inst)); inst_base->cond = BITS(inst, 28, 31); @@ -2582,7 +2594,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(stc)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(stm)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(stm)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); ldst_inst *inst_cream = (ldst_inst *)inst_base->component; @@ -2595,7 +2607,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(stm)(unsigned int inst, int index) inst_cream->get_addr = get_calc_addr_op(inst); return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtb_inst)); sxtb_inst *inst_cream = (sxtb_inst *)inst_base->component; @@ -2613,7 +2625,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb)(unsigned int inst, int index) inst_base->load_r15 = 1; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(str)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(str)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); ldst_inst *inst_cream = (ldst_inst *)inst_base->component; @@ -2630,7 +2642,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(str)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxth_inst)); uxth_inst *inst_cream = (uxth_inst *)inst_base->component; @@ -2648,7 +2660,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb)(unsigned int inst, int index) inst_base->load_r15 = 1; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxtab_inst)); uxtab_inst *inst_cream = (uxtab_inst *)inst_base->component; @@ -2665,7 +2677,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(strb)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(strb)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); ldst_inst *inst_cream = (ldst_inst *)inst_base->component; @@ -2682,7 +2694,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(strb)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(strbt)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(strbt)(unsigned int inst, int index) { arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); ldst_inst* inst_cream = (ldst_inst*)inst_base->component; @@ -2706,7 +2718,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(strbt)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(strd)(unsigned int inst, int index){ +static ARM_INST_PTR INTERPRETER_TRANSLATE(strd)(unsigned int inst, int index){ arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); ldst_inst *inst_cream = (ldst_inst *)inst_base->component; @@ -2722,7 +2734,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(strd)(unsigned int inst, int index){ } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(strex)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(strex)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); generic_arm_inst *inst_cream = (generic_arm_inst *)inst_base->component; @@ -2737,19 +2749,19 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(strex)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(strexb)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(strexb)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(strex)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(strexh)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(strexh)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(strex)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(strexd)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(strexd)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(strex)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(strh)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(strh)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); ldst_inst *inst_cream = (ldst_inst *)inst_base->component; @@ -2766,7 +2778,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(strh)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(strt)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(strt)(unsigned int inst, int index) { arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); ldst_inst* inst_cream = (ldst_inst*)inst_base->component; @@ -2794,7 +2806,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(strt)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(sub)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(sub)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sub_inst)); sub_inst *inst_cream = (sub_inst *)inst_base->component; @@ -2818,7 +2830,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(sub)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(swi)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(swi)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(swi_inst)); swi_inst *inst_cream = (swi_inst *)inst_base->component; @@ -2830,7 +2842,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(swi)(unsigned int inst, int index) inst_cream->num = BITS(inst, 0, 23); return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(swp)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(swp)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(swp_inst)); swp_inst *inst_cream = (swp_inst *)inst_base->component; @@ -2848,7 +2860,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(swp)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(swpb)(unsigned int inst, int index){ +static ARM_INST_PTR INTERPRETER_TRANSLATE(swpb)(unsigned int inst, int index){ arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(swp_inst)); swp_inst *inst_cream = (swp_inst *)inst_base->component; @@ -2865,7 +2877,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(swpb)(unsigned int inst, int index){ } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab)(unsigned int inst, int index){ +static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab)(unsigned int inst, int index){ arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtab_inst)); sxtab_inst *inst_cream = (sxtab_inst *)inst_base->component; @@ -2882,7 +2894,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab)(unsigned int inst, int index){ return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab16)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(sxtab_inst)); sxtab_inst* const inst_cream = (sxtab_inst*)inst_base->component; @@ -2899,12 +2911,12 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab16)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb16)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(sxtab16)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(sxtah)(unsigned int inst, int index){ +static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtah)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtah_inst)); sxtah_inst *inst_cream = (sxtah_inst *)inst_base->component; @@ -2921,7 +2933,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(sxtah)(unsigned int inst, int index){ return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(teq)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(teq)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(teq_inst)); teq_inst *inst_cream = (teq_inst *)inst_base->component; @@ -2940,7 +2952,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(teq)(unsigned int inst, int index) inst_base->load_r15 = 1; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(tst)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(tst)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(tst_inst)); tst_inst *inst_cream = (tst_inst *)inst_base->component; @@ -2965,7 +2977,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(tst)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(uadd8)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uadd8)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; @@ -2983,28 +2995,28 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(uadd8)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(uadd16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uadd16)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(uadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uaddsubx)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uaddsubx)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(uadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(usub8)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(usub8)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(uadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(usub16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(usub16)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(uadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(usubaddx)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(usubaddx)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(uadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd8)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd8)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; @@ -3022,27 +3034,27 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd8)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd16)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(uhadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uhaddsubx)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uhaddsubx)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(uhadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub8)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub8)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(uhadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub16)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(uhadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uhsubaddx)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uhsubaddx)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(uhadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(umaal)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(umaal)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(umaal_inst)); umaal_inst* const inst_cream = (umaal_inst*)inst_base->component; @@ -3062,7 +3074,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(umaal)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(umlal)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(umlal)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umlal_inst)); umlal_inst *inst_cream = (umlal_inst *)inst_base->component; @@ -3083,7 +3095,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(umlal)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(umull)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(umull)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umull_inst)); umull_inst *inst_cream = (umull_inst *)inst_base->component; @@ -3104,7 +3116,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(umull)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(b_2_thumb)(unsigned int tinst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(b_2_thumb)(unsigned int tinst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(b_2_thumb)); b_2_thumb *inst_cream = (b_2_thumb *)inst_base->component; @@ -3117,7 +3129,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(b_2_thumb)(unsigned int tinst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(b_cond_thumb)(unsigned int tinst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(b_cond_thumb)(unsigned int tinst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(b_cond_thumb)); b_cond_thumb *inst_cream = (b_cond_thumb *)inst_base->component; @@ -3130,7 +3142,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(b_cond_thumb)(unsigned int tinst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(bl_1_thumb)(unsigned int tinst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(bl_1_thumb)(unsigned int tinst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bl_1_thumb)); bl_1_thumb *inst_cream = (bl_1_thumb *)inst_base->component; @@ -3141,7 +3153,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(bl_1_thumb)(unsigned int tinst, int index) inst_base->br = NON_BRANCH; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(bl_2_thumb)(unsigned int tinst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(bl_2_thumb)(unsigned int tinst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bl_2_thumb)); bl_2_thumb *inst_cream = (bl_2_thumb *)inst_base->component; @@ -3152,7 +3164,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(bl_2_thumb)(unsigned int tinst, int index) inst_base->br = DIRECT_BRANCH; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(blx_1_thumb)(unsigned int tinst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(blx_1_thumb)(unsigned int tinst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(blx_1_thumb)); blx_1_thumb *inst_cream = (blx_1_thumb *)inst_base->component; @@ -3165,7 +3177,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(blx_1_thumb)(unsigned int tinst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd8)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd8)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; @@ -3183,27 +3195,27 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd8)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd16)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(uqadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uqaddsubx)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uqaddsubx)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(uqadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub8)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub8)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(uqadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub16)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(uqadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uqsubaddx)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uqsubaddx)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(uqadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(usada8)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(usada8)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; @@ -3215,26 +3227,27 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(usada8)(unsigned int inst, int index) inst_cream->op1 = BITS(inst, 20, 24); inst_cream->op2 = BITS(inst, 5, 7); + inst_cream->Rd = BITS(inst, 16, 19); inst_cream->Rm = BITS(inst, 8, 11); inst_cream->Rn = BITS(inst, 0, 3); inst_cream->Ra = BITS(inst, 12, 15); return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(usad8)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(usad8)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(usada8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(usat)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(usat)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(ssat)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(usat16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(usat16)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(ssat16)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab16)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(uxtab_inst)); uxtab_inst* const inst_cream = (uxtab_inst*)inst_base->component; @@ -3251,7 +3264,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab16)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb16)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb16)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(uxtab16)(inst, index); } @@ -3469,13 +3482,13 @@ const transop_fp_t arm_instruction_trans[] = { }; typedef std::unordered_map<u32, int> bb_map; -bb_map CreamCache; +static bb_map CreamCache; -void insert_bb(unsigned int addr, int start) { +static void insert_bb(unsigned int addr, int start) { CreamCache[addr] = start; } -int find_bb(unsigned int addr, int &start) { +static int find_bb(unsigned int addr, int& start) { int ret = -1; bb_map::const_iterator it = CreamCache.find(addr); if (it != CreamCache.end()) { @@ -3492,7 +3505,7 @@ enum { FETCH_FAILURE }; -static tdstate decode_thumb_instr(arm_processor *cpu, uint32_t inst, addr_t addr, uint32_t *arm_inst, uint32_t* inst_size, ARM_INST_PTR* ptr_inst_base){ +static tdstate decode_thumb_instr(ARMul_State* cpu, uint32_t inst, addr_t addr, uint32_t* arm_inst, uint32_t* inst_size, ARM_INST_PTR* ptr_inst_base){ // Check if in Thumb mode tdstate ret = thumb_translate (addr, inst, arm_inst, inst_size); if(ret == t_branch){ @@ -3555,24 +3568,7 @@ typedef struct instruction_set_encoding_item ISEITEM; extern const ISEITEM arm_instruction[]; -vector<uint64_t> code_page_set; - -void flush_bb(uint32_t addr) { - bb_map::iterator it; - uint32_t start; - - addr &= 0xfffff000; - for (it = CreamCache.begin(); it != CreamCache.end(); ) { - start = static_cast<uint32_t>(it->first); - start &= 0xfffff000; - if (start == addr) { - CreamCache.erase(it++); - } else - ++it; - } -} - -int InterpreterTranslate(arm_processor *cpu, int &bb_start, addr_t addr) { +static int InterpreterTranslate(ARMul_State* cpu, int& bb_start, addr_t addr) { // Decode instruction, get index // Allocate memory and init InsCream // Go on next, until terminal instruction @@ -3628,9 +3624,7 @@ translated: return KEEP_GOING; } -#define LOG_IN_CLR skyeye_printf_in_color - -int clz(unsigned int x) { +static int clz(unsigned int x) { int n; if (x == 0) return (32); n = 1; @@ -3642,9 +3636,7 @@ int clz(unsigned int x) { return n; } -unsigned arm_dyncom_SWI (ARMul_State * state, ARMword number); - -static bool InAPrivilegedMode(arm_core_t *core) { +static bool InAPrivilegedMode(ARMul_State* core) { return (core->Mode != USER32MODE); } @@ -3904,7 +3896,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) { #define PC (cpu->Reg[15]) #define CHECK_EXT_INT if (!cpu->NirqSig && !(cpu->Cpsr & 0x80)) goto END; - arm_processor *cpu = state; + ARMul_State* cpu = state; // GCC and Clang have a C++ extension to support a lookup table of labels. Otherwise, fallback // to a clunky switch statement. @@ -4105,6 +4097,16 @@ unsigned InterpreterMainLoop(ARMul_State* state) { GOTO_NEXT_INST; } BKPT_INST: + { + if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { + bkpt_inst* const inst_cream = (bkpt_inst*)inst_base->component; + LOG_DEBUG(Core_ARM11, "Breakpoint instruction hit. Immediate: 0x%08X", inst_cream->imm); + } + cpu->Reg[15] += GET_INST_SIZE(cpu); + INC_PC(sizeof(bkpt_inst)); + FETCH_INST; + GOTO_NEXT_INST; + } BLX_INST: { blx_inst *inst_cream = (blx_inst *)inst_base->component; diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.h b/src/core/arm/dyncom/arm_dyncom_interpreter.h index 4791ea25..1c324d29 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.h +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.h @@ -4,4 +4,6 @@ #pragma once +#include "core/arm/skyeye_common/armdefs.h" + unsigned InterpreterMainLoop(ARMul_State* state); diff --git a/src/core/arm/dyncom/arm_dyncom_run.cpp b/src/core/arm/dyncom/arm_dyncom_run.cpp index d79e3e4b..5a9a6a78 100644 --- a/src/core/arm/dyncom/arm_dyncom_run.cpp +++ b/src/core/arm/dyncom/arm_dyncom_run.cpp @@ -2,9 +2,10 @@ // Licensed under GPLv2 or any later version // Refer to the license.txt file included. +#include "core/arm/dyncom/arm_dyncom_run.h" #include "core/arm/skyeye_common/armdefs.h" -void switch_mode(arm_core_t *core, uint32_t mode) { +void switch_mode(ARMul_State* core, uint32_t mode) { if (core->Mode == mode) return; diff --git a/src/core/arm/dyncom/arm_dyncom_run.h b/src/core/arm/dyncom/arm_dyncom_run.h index b1c0daaf..e1742049 100644 --- a/src/core/arm/dyncom/arm_dyncom_run.h +++ b/src/core/arm/dyncom/arm_dyncom_run.h @@ -18,10 +18,12 @@ #pragma once -void switch_mode(arm_core_t *core, uint32_t mode); +#include "core/arm/skyeye_common/armdefs.h" + +void switch_mode(ARMul_State* core, uint32_t mode); /* FIXME, we temporarily think thumb instruction is always 16 bit */ -static inline u32 GET_INST_SIZE(arm_core_t* core) { +static inline u32 GET_INST_SIZE(ARMul_State* core) { return core->TFlag? 2 : 4; } @@ -33,7 +35,7 @@ static inline u32 GET_INST_SIZE(arm_core_t* core) { * * @return */ -static inline addr_t CHECK_READ_REG15_WA(arm_core_t* core, int Rn) { +static inline addr_t CHECK_READ_REG15_WA(ARMul_State* core, int Rn) { return (Rn == 15)? ((core->Reg[15] & ~0x3) + GET_INST_SIZE(core) * 2) : core->Reg[Rn]; } @@ -45,6 +47,6 @@ static inline addr_t CHECK_READ_REG15_WA(arm_core_t* core, int Rn) { * * @return */ -static inline u32 CHECK_READ_REG15(arm_core_t* core, int Rn) { +static inline u32 CHECK_READ_REG15(ARMul_State* core, int Rn) { return (Rn == 15)? ((core->Reg[15] & ~0x1) + GET_INST_SIZE(core) * 2) : core->Reg[Rn]; } diff --git a/src/core/arm/dyncom/arm_dyncom_thumb.cpp b/src/core/arm/dyncom/arm_dyncom_thumb.cpp index d5a69836..e30d515f 100644 --- a/src/core/arm/dyncom/arm_dyncom_thumb.cpp +++ b/src/core/arm/dyncom/arm_dyncom_thumb.cpp @@ -5,27 +5,17 @@ // We can provide simple Thumb simulation by decoding the Thumb instruction into its corresponding // ARM instruction, and using the existing ARM simulator. -#include "core/arm/skyeye_common/skyeye_defs.h" - -#ifndef MODET // Required for the Thumb instruction support -#if 1 -#error "MODET needs to be defined for the Thumb world to work" -#else -#define MODET (1) -#endif -#endif - -#include "core/arm/skyeye_common/armos.h" #include "core/arm/dyncom/arm_dyncom_thumb.h" +#include "core/arm/skyeye_common/armos.h" +#include "core/arm/skyeye_common/skyeye_defs.h" // Decode a 16bit Thumb instruction. The instruction is in the low 16-bits of the tinstr field, // with the following Thumb instruction held in the high 16-bits. Passing in two Thumb instructions // allows easier simulation of the special dual BL instruction. -tdstate thumb_translate (addr_t addr, uint32_t instr, uint32_t* ainstr, uint32_t* inst_size) { +tdstate thumb_translate(addr_t addr, uint32_t instr, uint32_t* ainstr, uint32_t* inst_size) { tdstate valid = t_uninitialized; - ARMword tinstr; - tinstr = instr; + ARMword tinstr = instr; // The endian should be judge here if((addr & 0x3) != 0) diff --git a/src/core/arm/interpreter/arminit.cpp b/src/core/arm/interpreter/arminit.cpp index d3174c9a..abafe226 100644 --- a/src/core/arm/interpreter/arminit.cpp +++ b/src/core/arm/interpreter/arminit.cpp @@ -15,6 +15,7 @@ along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +#include <cstring> #include "core/arm/skyeye_common/armdefs.h" #include "core/arm/skyeye_common/armemu.h" @@ -23,7 +24,7 @@ \***************************************************************************/ ARMul_State* ARMul_NewState(ARMul_State* state) { - memset (state, 0, sizeof (ARMul_State)); + memset(state, 0, sizeof(ARMul_State)); state->Emulate = RUN; for (unsigned int i = 0; i < 16; i++) { diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp index fd90fb0a..ed4f6c2a 100644 --- a/src/core/arm/interpreter/armsupp.cpp +++ b/src/core/arm/interpreter/armsupp.cpp @@ -16,9 +16,6 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "core/arm/skyeye_common/armdefs.h" -#include "core/arm/skyeye_common/armemu.h" -#include "core/arm/disassembler/arm_disasm.h" -#include "core/mem_map.h" // Unsigned sum of absolute difference u8 ARMul_UnsignedAbsoluteDifference(u8 left, u8 right) diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h index dc2256a3..070fcf7d 100644 --- a/src/core/arm/skyeye_common/armdefs.h +++ b/src/core/arm/skyeye_common/armdefs.h @@ -17,19 +17,9 @@ #pragma once -#include <cerrno> -#include <csignal> -#include <cstdio> -#include <cstdlib> -#include <cstring> -#include <fcntl.h> -#include <sys/stat.h> -#include <sys/types.h> - -#include "arm_regformat.h" #include "common/common_types.h" -#include "common/platform.h" #include "core/arm/skyeye_common/armmmu.h" +#include "core/arm/skyeye_common/arm_regformat.h" #include "core/arm/skyeye_common/skyeye_defs.h" #define BITS(s, a, b) ((s << ((sizeof(s) * 8 - 1) - b)) >> (sizeof(s) * 8 - b + a - 1)) @@ -118,9 +108,7 @@ struct ARMul_State // Add armv6 flags dyf:2010-08-09 ARMword GEFlag, EFlag, AFlag, QFlag; -#ifdef MODET ARMword TFlag; // Thumb state -#endif unsigned long long NumInstrs; // The number of instructions executed unsigned NumInstrsToExecute; @@ -218,8 +206,6 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model) u32 CurrWrite; }; -typedef ARMul_State arm_core_t; - /***************************************************************************\ * Types of ARM we know about * \***************************************************************************/ diff --git a/src/core/arm/skyeye_common/armemu.h b/src/core/arm/skyeye_common/armemu.h index 2467f431..2a1c5077 100644 --- a/src/core/arm/skyeye_common/armemu.h +++ b/src/core/arm/skyeye_common/armemu.h @@ -19,61 +19,24 @@ #include "core/arm/skyeye_common/armdefs.h" -/* Macros to twiddle the status flags and mode. */ -#define NBIT ((unsigned)1L << 31) -#define ZBIT (1L << 30) -#define CBIT (1L << 29) -#define VBIT (1L << 28) -#define QBIT (1L << 27) -#define IBIT (1L << 7) -#define FBIT (1L << 6) -#define IFBITS (3L << 6) -#define R15IBIT (1L << 27) -#define R15FBIT (1L << 26) -#define R15IFBITS (3L << 26) +// Flags for use with the APSR. +enum : u32 { + NBIT = (1U << 31U), + ZBIT = (1 << 30), + CBIT = (1 << 29), + VBIT = (1 << 28), + QBIT = (1 << 27), + JBIT = (1 << 24), + EBIT = (1 << 9), + ABIT = (1 << 8), + IBIT = (1 << 7), + FBIT = (1 << 6), + TBIT = (1 << 5), -#if defined MODE32 || defined MODET -#define CCBITS (0xf8000000L) -#else -#define CCBITS (0xf0000000L) -#endif - -#define INTBITS (0xc0L) - -#if defined MODET && defined MODE32 -#define PCBITS (0xffffffffL) -#else -#define PCBITS (0xfffffffcL) -#endif - -#define MODEBITS (0x1fL) -#define R15INTBITS (3L << 26) - -#if defined MODET && defined MODE32 -#define R15PCBITS (0x03ffffffL) -#else -#define R15PCBITS (0x03fffffcL) -#endif - -#define R15MODEBITS (0x3L) - -#ifdef MODE32 -#define PCMASK PCBITS -#define PCWRAP(pc) (pc) -#else -#define PCMASK R15PCBITS -#define PCWRAP(pc) ((pc) & R15PCBITS) -#endif - -#define PC (state->Reg[15] & PCMASK) -#define R15CCINTMODE (state->Reg[15] & (CCBITS | R15INTBITS | R15MODEBITS)) -#define R15INT (state->Reg[15] & R15INTBITS) -#define R15INTPC (state->Reg[15] & (R15INTBITS | R15PCBITS)) -#define R15INTPCMODE (state->Reg[15] & (R15INTBITS | R15PCBITS | R15MODEBITS)) -#define R15INTMODE (state->Reg[15] & (R15INTBITS | R15MODEBITS)) -#define R15PC (state->Reg[15] & R15PCBITS) -#define R15PCMODE (state->Reg[15] & (R15PCBITS | R15MODEBITS)) -#define R15MODE (state->Reg[15] & R15MODEBITS) + // Masks for groups of bits in the APSR. + MODEBITS = 0x1F, + INTBITS = 0x1C0, +}; // Different ways to start the next instruction. enum { diff --git a/src/core/arm/skyeye_common/skyeye_defs.h b/src/core/arm/skyeye_common/skyeye_defs.h index 6648e9d6..edf6097e 100644 --- a/src/core/arm/skyeye_common/skyeye_defs.h +++ b/src/core/arm/skyeye_common/skyeye_defs.h @@ -1,57 +1,38 @@ #pragma once -#include "common/common.h" +#include "common/common_types.h" -#define MODE32 -#define MODET - -typedef struct +struct cpu_config_t { - const char *cpu_arch_name; /* CPU architecture version name.e.g. armv4t */ - const char *cpu_name; /* CPU name. e.g. arm7tdmi or arm720t */ - u32 cpu_val; /*CPU value; also call MMU ID or processor id;see - ARM Architecture Reference Manual B2-6 */ - u32 cpu_mask; /* cpu_val's mask. */ - u32 cachetype; /* this CPU has what kind of cache */ -} cpu_config_t; - -typedef enum { - /* No exception */ - No_exp = 0, - /* Memory allocation exception */ - Malloc_exp, - /* File open exception */ - File_open_exp, - /* DLL open exception */ - Dll_open_exp, - /* Invalid argument exception */ - Invarg_exp, - /* Invalid module exception */ - Invmod_exp, - /* wrong format exception for config file parsing */ - Conf_format_exp, - /* some reference excess the predefiend range. Such as the index out of array range */ - Excess_range_exp, - /* Can not find the desirable result */ - Not_found_exp, - - /* Unknown exception */ - Unknown_exp -} exception_t; - -typedef enum { - Align = 0, - UnAlign -} align_t; - -typedef enum { - Little_endian = 0, - Big_endian -} endian_t; - -typedef enum { - Phys_addr = 0, - Virt_addr -} addr_type_t; + const char* cpu_arch_name; // CPU architecture version name.e.g. ARMv4T + const char* cpu_name; // CPU name. e.g. ARM7TDMI or ARM720T + u32 cpu_val; // CPU value; also call MMU ID or processor id;see + // ARM Architecture Reference Manual B2-6 + u32 cpu_mask; // cpu_val's mask. + u32 cachetype; // CPU cache type +}; + +enum { + // No exception + No_exp = 0, + // Memory allocation exception + Malloc_exp, + // File open exception + File_open_exp, + // DLL open exception + Dll_open_exp, + // Invalid argument exception + Invarg_exp, + // Invalid module exception + Invmod_exp, + // wrong format exception for config file parsing + Conf_format_exp, + // some reference excess the predefiend range. Such as the index out of array range + Excess_range_exp, + // Can not find the desirable result + Not_found_exp, + // Unknown exception + Unknown_exp +}; typedef u32 addr_t; diff --git a/src/core/arm/skyeye_common/vfp/vfp.cpp b/src/core/arm/skyeye_common/vfp/vfp.cpp index 6f22923b..6286e7b6 100644 --- a/src/core/arm/skyeye_common/vfp/vfp.cpp +++ b/src/core/arm/skyeye_common/vfp/vfp.cpp @@ -21,6 +21,7 @@ /* Note: this file handles interface with arm core and vfp registers */ #include "common/common.h" +#include "common/logging/log.h" #include "core/arm/skyeye_common/armdefs.h" #include "core/arm/skyeye_common/vfp/asm_vfp.h" @@ -724,26 +725,26 @@ void VMOVR(ARMul_State* state, ARMword single, ARMword d, ARMword m) } /* Miscellaneous functions */ -int32_t vfp_get_float(arm_core_t* state, unsigned int reg) +int32_t vfp_get_float(ARMul_State* state, unsigned int reg) { LOG_TRACE(Core_ARM11, "VFP get float: s%d=[%08x]\n", reg, state->ExtReg[reg]); return state->ExtReg[reg]; } -void vfp_put_float(arm_core_t* state, int32_t val, unsigned int reg) +void vfp_put_float(ARMul_State* state, int32_t val, unsigned int reg) { LOG_TRACE(Core_ARM11, "VFP put float: s%d <= [%08x]\n", reg, val); state->ExtReg[reg] = val; } -uint64_t vfp_get_double(arm_core_t* state, unsigned int reg) +uint64_t vfp_get_double(ARMul_State* state, unsigned int reg) { uint64_t result = ((uint64_t) state->ExtReg[reg*2+1])<<32 | state->ExtReg[reg*2]; LOG_TRACE(Core_ARM11, "VFP get double: s[%d-%d]=[%016llx]\n", reg * 2 + 1, reg * 2, result); return result; } -void vfp_put_double(arm_core_t* state, uint64_t val, unsigned int reg) +void vfp_put_double(ARMul_State* state, uint64_t val, unsigned int reg) { LOG_TRACE(Core_ARM11, "VFP put double: s[%d-%d] <= [%08x-%08x]\n", reg * 2 + 1, reg * 2, (uint32_t)(val >> 32), (uint32_t)(val & 0xffffffff)); state->ExtReg[reg*2] = (uint32_t) (val & 0xffffffff); diff --git a/src/core/arm/skyeye_common/vfp/vfp_helper.h b/src/core/arm/skyeye_common/vfp/vfp_helper.h index b68090b8..75d860e9 100644 --- a/src/core/arm/skyeye_common/vfp/vfp_helper.h +++ b/src/core/arm/skyeye_common/vfp/vfp_helper.h @@ -32,11 +32,7 @@ #pragma once -/* Custom edit */ - -#include <stdint.h> -#include <stdio.h> - +#include <cstdio> #include "common/common_types.h" #include "core/arm/skyeye_common/armdefs.h" diff --git a/src/core/arm/skyeye_common/vfp/vfpdouble.cpp b/src/core/arm/skyeye_common/vfp/vfpdouble.cpp index 9a708808..1a05ef8c 100644 --- a/src/core/arm/skyeye_common/vfp/vfpdouble.cpp +++ b/src/core/arm/skyeye_common/vfp/vfpdouble.cpp @@ -51,6 +51,7 @@ * =========================================================================== */ +#include "common/logging/log.h" #include "core/arm/skyeye_common/vfp/vfp.h" #include "core/arm/skyeye_common/vfp/vfp_helper.h" #include "core/arm/skyeye_common/vfp/asm_vfp.h" @@ -380,7 +381,7 @@ static u32 vfp_compare(ARMul_State* state, int dd, int signal_on_qnan, int dm, u s64 d, m; u32 ret = 0; - LOG_TRACE(Core_ARM11, "In %s, state=0x%x, fpscr=0x%x\n", __FUNCTION__, state, fpscr); + LOG_TRACE(Core_ARM11, "In %s, state=0x%p, fpscr=0x%x\n", __FUNCTION__, state, fpscr); m = vfp_get_double(state, dm); if (vfp_double_packed_exponent(m) == 2047 && vfp_double_packed_mantissa(m)) { ret |= FPSCR_CFLAG | FPSCR_VFLAG; @@ -435,7 +436,7 @@ static u32 vfp_compare(ARMul_State* state, int dd, int signal_on_qnan, int dm, u ret |= FPSCR_CFLAG; } } - LOG_TRACE(Core_ARM11, "In %s, state=0x%x, ret=0x%x\n", __FUNCTION__, state, ret); + LOG_TRACE(Core_ARM11, "In %s, state=0x%p, ret=0x%x\n", __FUNCTION__, state, ret); return ret; } diff --git a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp index 0aa2d508..b9b96c38 100644 --- a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp +++ b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp @@ -19,7 +19,7 @@ typedef struct _vmla_inst { } vmla_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vmla)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmla)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmla_inst)); vmla_inst *inst_cream = (vmla_inst *)inst_base->component; @@ -69,7 +69,7 @@ typedef struct _vmls_inst { } vmls_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vmls)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmls)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmls_inst)); vmls_inst *inst_cream = (vmls_inst *)inst_base->component; @@ -119,7 +119,7 @@ typedef struct _vnmla_inst { } vnmla_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vnmla)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmla)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmla_inst)); vnmla_inst *inst_cream = (vnmla_inst *)inst_base->component; @@ -170,7 +170,7 @@ typedef struct _vnmls_inst { } vnmls_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vnmls)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmls)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmls_inst)); vnmls_inst *inst_cream = (vnmls_inst *)inst_base->component; @@ -220,7 +220,7 @@ typedef struct _vnmul_inst { } vnmul_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vnmul)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmul)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmul_inst)); vnmul_inst *inst_cream = (vnmul_inst *)inst_base->component; @@ -270,7 +270,7 @@ typedef struct _vmul_inst { } vmul_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vmul)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmul)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmul_inst)); vmul_inst *inst_cream = (vmul_inst *)inst_base->component; @@ -320,7 +320,7 @@ typedef struct _vadd_inst { } vadd_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vadd)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vadd)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vadd_inst)); vadd_inst *inst_cream = (vadd_inst *)inst_base->component; @@ -370,7 +370,7 @@ typedef struct _vsub_inst { } vsub_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vsub)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vsub)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vsub_inst)); vsub_inst *inst_cream = (vsub_inst *)inst_base->component; @@ -420,7 +420,7 @@ typedef struct _vdiv_inst { } vdiv_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vdiv)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vdiv)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vdiv_inst)); vdiv_inst *inst_cream = (vdiv_inst *)inst_base->component; @@ -472,7 +472,7 @@ typedef struct _vmovi_inst { } vmovi_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vmovi)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovi)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovi_inst)); vmovi_inst *inst_cream = (vmovi_inst *)inst_base->component; @@ -521,7 +521,7 @@ typedef struct _vmovr_inst { } vmovr_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vmovr)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovr)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovr_inst)); vmovr_inst *inst_cream = (vmovr_inst *)inst_base->component; @@ -564,7 +564,7 @@ typedef struct _vabs_inst { } vabs_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vabs)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vabs)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vabs_inst)); vabs_inst *inst_cream = (vabs_inst *)inst_base->component; @@ -615,7 +615,7 @@ typedef struct _vneg_inst { } vneg_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vneg)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vneg)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vneg_inst)); vneg_inst *inst_cream = (vneg_inst *)inst_base->component; @@ -665,7 +665,7 @@ typedef struct _vsqrt_inst { } vsqrt_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vsqrt)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vsqrt)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vsqrt_inst)); vsqrt_inst *inst_cream = (vsqrt_inst *)inst_base->component; @@ -715,7 +715,7 @@ typedef struct _vcmp_inst { } vcmp_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcmp_inst)); vcmp_inst *inst_cream = (vcmp_inst *)inst_base->component; @@ -765,7 +765,7 @@ typedef struct _vcmp2_inst { } vcmp2_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp2)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp2)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcmp2_inst)); vcmp2_inst *inst_cream = (vcmp2_inst *)inst_base->component; @@ -815,7 +815,7 @@ typedef struct _vcvtbds_inst { } vcvtbds_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbds)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbds)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbds_inst)); vcvtbds_inst *inst_cream = (vcvtbds_inst *)inst_base->component; @@ -865,7 +865,7 @@ typedef struct _vcvtbff_inst { } vcvtbff_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbff)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbff)(unsigned int inst, int index) { VFP_DEBUG_UNTESTED(VCVTBFF); @@ -917,7 +917,7 @@ typedef struct _vcvtbfi_inst { } vcvtbfi_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbfi)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbfi)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbfi_inst)); vcvtbfi_inst *inst_cream = (vcvtbfi_inst *)inst_base->component; @@ -974,7 +974,7 @@ typedef struct _vmovbrs_inst { } vmovbrs_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrs)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrs)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrs_inst)); vmovbrs_inst *inst_cream = (vmovbrs_inst *)inst_base->component; @@ -1019,7 +1019,7 @@ typedef struct _vmsr_inst { } vmsr_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vmsr)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmsr)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmsr_inst)); vmsr_inst *inst_cream = (vmsr_inst *)inst_base->component; @@ -1068,7 +1068,7 @@ typedef struct _vmovbrc_inst { } vmovbrc_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrc)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrc)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrc_inst)); vmovbrc_inst *inst_cream = (vmovbrc_inst *)inst_base->component; @@ -1115,7 +1115,7 @@ typedef struct _vmrs_inst { } vmrs_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vmrs)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmrs)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmrs_inst)); vmrs_inst *inst_cream = (vmrs_inst *)inst_base->component; @@ -1199,7 +1199,7 @@ typedef struct _vmovbcr_inst { } vmovbcr_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbcr)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbcr)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbcr_inst)); vmovbcr_inst *inst_cream = (vmovbcr_inst *)inst_base->component; @@ -1253,7 +1253,7 @@ typedef struct _vmovbrrss_inst { } vmovbrrss_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrss)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrss)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrrss_inst)); vmovbrrss_inst *inst_cream = (vmovbrrss_inst *)inst_base->component; @@ -1302,7 +1302,7 @@ typedef struct _vmovbrrd_inst { } vmovbrrd_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrd)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrd)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrrd_inst)); vmovbrrd_inst *inst_cream = (vmovbrrd_inst *)inst_base->component; @@ -1356,7 +1356,7 @@ typedef struct _vstr_inst { } vstr_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vstr)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vstr)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vstr_inst)); vstr_inst *inst_cream = (vstr_inst *)inst_base->component; @@ -1415,7 +1415,7 @@ typedef struct _vpush_inst { } vpush_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vpush)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vpush)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vpush_inst)); vpush_inst *inst_cream = (vpush_inst *)inst_base->component; @@ -1443,7 +1443,7 @@ VPUSH_INST: addr = cpu->Reg[R13] - inst_cream->imm32; - for (int i = 0; i < inst_cream->regs; i++) + for (unsigned int i = 0; i < inst_cream->regs; i++) { if (inst_cream->single) { @@ -1481,7 +1481,7 @@ typedef struct _vstm_inst { } vstm_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vstm)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vstm)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vstm_inst)); vstm_inst *inst_cream = (vstm_inst *)inst_base->component; @@ -1512,7 +1512,7 @@ VSTM_INST: /* encoding 1 */ addr = (inst_cream->add ? cpu->Reg[inst_cream->n] : cpu->Reg[inst_cream->n] - inst_cream->imm32); - for (int i = 0; i < inst_cream->regs; i++) + for (unsigned int i = 0; i < inst_cream->regs; i++) { if (inst_cream->single) { @@ -1551,7 +1551,7 @@ typedef struct _vpop_inst { } vpop_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vpop)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vpop)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vpop_inst)); vpop_inst *inst_cream = (vpop_inst *)inst_base->component; @@ -1581,7 +1581,7 @@ VPOP_INST: addr = cpu->Reg[R13]; - for (int i = 0; i < inst_cream->regs; i++) + for (unsigned int i = 0; i < inst_cream->regs; i++) { if (inst_cream->single) { @@ -1621,7 +1621,7 @@ typedef struct _vldr_inst { } vldr_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vldr)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vldr)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vldr_inst)); vldr_inst *inst_cream = (vldr_inst *)inst_base->component; @@ -1687,7 +1687,7 @@ typedef struct _vldm_inst { } vldm_inst; #endif #ifdef VFP_INTERPRETER_TRANS -ARM_INST_PTR INTERPRETER_TRANSLATE(vldm)(unsigned int inst, int index) +static ARM_INST_PTR INTERPRETER_TRANSLATE(vldm)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vldm_inst)); vldm_inst *inst_cream = (vldm_inst *)inst_base->component; @@ -1718,7 +1718,7 @@ VLDM_INST: addr = (inst_cream->add ? cpu->Reg[inst_cream->n] : cpu->Reg[inst_cream->n] - inst_cream->imm32); - for (int i = 0; i < inst_cream->regs; i++) + for (unsigned int i = 0; i < inst_cream->regs; i++) { if (inst_cream->single) { diff --git a/src/core/core_timing.cpp b/src/core/core_timing.cpp index d96d3fe1..60487516 100644 --- a/src/core/core_timing.cpp +++ b/src/core/core_timing.cpp @@ -69,7 +69,7 @@ using AdvanceCallback = void(int cycles_executed); static AdvanceCallback* advance_callback = nullptr; static std::vector<MHzChangeCallback> mhz_change_callbacks; -void FireMhzChange() { +static void FireMhzChange() { for (auto callback : mhz_change_callbacks) callback(); } @@ -97,7 +97,7 @@ u64 GetGlobalTimeUs() { return last_global_time_us + us_since_last; } -Event* GetNewEvent() { +static Event* GetNewEvent() { if (!event_pool) return new Event; @@ -106,7 +106,7 @@ Event* GetNewEvent() { return event; } -Event* GetNewTsEvent() { +static Event* GetNewTsEvent() { allocated_ts_events++; if (!event_ts_pool) @@ -117,12 +117,12 @@ Event* GetNewTsEvent() { return event; } -void FreeEvent(Event* event) { +static void FreeEvent(Event* event) { event->next = event_pool; event_pool = event; } -void FreeTsEvent(Event* event) { +static void FreeTsEvent(Event* event) { event->next = event_ts_pool; event_ts_pool = event; allocated_ts_events--; @@ -133,7 +133,7 @@ int RegisterEvent(const char* name, TimedCallback callback) { return (int)event_types.size() - 1; } -void AntiCrashCallback(u64 userdata, int cycles_late) { +static void AntiCrashCallback(u64 userdata, int cycles_late) { LOG_CRITICAL(Core_Timing, "Savestate broken: an unregistered event was called."); Core::Halt("invalid timing events"); } @@ -228,7 +228,7 @@ void ClearPendingEvents() { } } -void AddEventToQueue(Event* new_event) { +static void AddEventToQueue(Event* new_event) { Event* prev_event = nullptr; Event** next_event = &first; for (;;) { @@ -459,7 +459,7 @@ void MoveEvents() { } void ForceCheck() { - int cycles_executed = g_slice_length - Core::g_app_core->down_count; + s64 cycles_executed = g_slice_length - Core::g_app_core->down_count; global_timer += cycles_executed; // This will cause us to check for new events immediately. Core::g_app_core->down_count = 0; @@ -468,7 +468,7 @@ void ForceCheck() { } void Advance() { - int cycles_executed = g_slice_length - Core::g_app_core->down_count; + s64 cycles_executed = g_slice_length - Core::g_app_core->down_count; global_timer += cycles_executed; Core::g_app_core->down_count = g_slice_length; @@ -504,13 +504,13 @@ void LogPendingEvents() { } void Idle(int max_idle) { - int cycles_down = Core::g_app_core->down_count; + s64 cycles_down = Core::g_app_core->down_count; if (max_idle != 0 && cycles_down > max_idle) cycles_down = max_idle; if (first && cycles_down > 0) { - int cycles_executed = g_slice_length - Core::g_app_core->down_count; - int cycles_next_event = (int)(first->time - global_timer); + s64 cycles_executed = g_slice_length - Core::g_app_core->down_count; + s64 cycles_next_event = first->time - global_timer; if (cycles_next_event < cycles_executed + cycles_down) { cycles_down = cycles_next_event - cycles_executed; diff --git a/src/core/hle/hle.cpp b/src/core/hle/hle.cpp index fd4761c7..b0066e15 100644 --- a/src/core/hle/hle.cpp +++ b/src/core/hle/hle.cpp @@ -23,7 +23,7 @@ static std::vector<ModuleDef> g_module_db; bool g_reschedule = false; ///< If true, immediately reschedules the CPU to a new thread -const FunctionDef* GetSVCInfo(u32 opcode) { +static const FunctionDef* GetSVCInfo(u32 opcode) { u32 func_num = opcode & 0xFFFFFF; // 8 bits if (func_num > 0xFF) { LOG_ERROR(Kernel_SVC,"unknown svc=0x%02X", func_num); @@ -64,7 +64,7 @@ void RegisterModule(std::string name, int num_functions, const FunctionDef* func g_module_db.push_back(module); } -void RegisterAllModules() { +static void RegisterAllModules() { SVC::Register(); } diff --git a/src/core/hle/kernel/kernel.cpp b/src/core/hle/kernel/kernel.cpp index eb61d8ef..498b2ec9 100644 --- a/src/core/hle/kernel/kernel.cpp +++ b/src/core/hle/kernel/kernel.cpp @@ -96,7 +96,7 @@ ResultCode HandleTable::Close(Handle handle) { if (!IsValid(handle)) return ERR_INVALID_HANDLE; - size_t slot = GetSlot(handle); + u16 slot = GetSlot(handle); objects[slot] = nullptr; @@ -127,7 +127,7 @@ SharedPtr<Object> HandleTable::GetGeneric(Handle handle) const { } void HandleTable::Clear() { - for (size_t i = 0; i < MAX_COUNT; ++i) { + for (u16 i = 0; i < MAX_COUNT; ++i) { generations[i] = i + 1; objects[i] = nullptr; } diff --git a/src/core/hle/kernel/kernel.h b/src/core/hle/kernel/kernel.h index 4d8e388b..2d295ea0 100644 --- a/src/core/hle/kernel/kernel.h +++ b/src/core/hle/kernel/kernel.h @@ -253,7 +253,7 @@ private: */ static const size_t MAX_COUNT = 4096; - static size_t GetSlot(Handle handle) { return handle >> 15; } + static u16 GetSlot(Handle handle) { return handle >> 15; } static u16 GetGeneration(Handle handle) { return handle & 0x7FFF; } /// Stores the Object referenced by the handle or null if the slot is empty. diff --git a/src/core/hle/kernel/timer.cpp b/src/core/hle/kernel/timer.cpp index aa0afb79..610e26a3 100644 --- a/src/core/hle/kernel/timer.cpp +++ b/src/core/hle/kernel/timer.cpp @@ -63,7 +63,7 @@ void Timer::Clear() { /// The timer callback event, called when a timer is fired static void TimerCallback(u64 timer_handle, int cycles_late) { - SharedPtr<Timer> timer = timer_callback_handle_table.Get<Timer>(timer_handle); + SharedPtr<Timer> timer = timer_callback_handle_table.Get<Timer>(static_cast<Handle>(timer_handle)); if (timer == nullptr) { LOG_CRITICAL(Kernel, "Callback fired for invalid timer %08X", timer_handle); diff --git a/src/core/hle/service/ac_u.cpp b/src/core/hle/service/ac_u.cpp index 50644816..f8aab6bc 100644 --- a/src/core/hle/service/ac_u.cpp +++ b/src/core/hle/service/ac_u.cpp @@ -17,7 +17,7 @@ namespace AC_U { * 1 : Result of function, 0 on success, otherwise error code * 2 : Output connection type, 0 = none, 1 = Old3DS Internet, 2 = New3DS Internet. */ -void GetWifiStatus(Service::Interface* self) { +static void GetWifiStatus(Service::Interface* self) { u32* cmd_buff = Kernel::GetCommandBuffer(); // TODO(purpasmart96): This function is only a stub, diff --git a/src/core/hle/service/apt_u.cpp b/src/core/hle/service/apt_u.cpp index 12af5e9f..2d605a76 100644 --- a/src/core/hle/service/apt_u.cpp +++ b/src/core/hle/service/apt_u.cpp @@ -160,7 +160,7 @@ void GetAppletManInfo(Service::Interface* self) { * 1 : Result of function, 0 on success, otherwise error code * 2 : Output, 0 = not registered, 1 = registered. */ -void IsRegistered(Service::Interface* self) { +static void IsRegistered(Service::Interface* self) { u32* cmd_buff = Kernel::GetCommandBuffer(); u32 app_id = cmd_buff[1]; cmd_buff[1] = RESULT_SUCCESS.raw; // No error @@ -191,7 +191,7 @@ void InquireNotification(Service::Interface* self) { * 0 : Return Header * 1 : Result of function, 0 on success, otherwise error code */ -void SendParameter(Service::Interface* self) { +static void SendParameter(Service::Interface* self) { u32* cmd_buff = Kernel::GetCommandBuffer(); u32 src_app_id = cmd_buff[1]; u32 dst_app_id = cmd_buff[2]; @@ -291,7 +291,7 @@ void GlanceParameter(Service::Interface* self) { * 2 : Status flag, 0 = failure due to no parameter data being available, or the above enabled * fields don't match the fields in NS state. 1 = success. */ -void CancelParameter(Service::Interface* self) { +static void CancelParameter(Service::Interface* self) { u32* cmd_buff = Kernel::GetCommandBuffer(); u32 flag1 = cmd_buff[1]; u32 unk = cmd_buff[2]; @@ -367,7 +367,7 @@ void GetSharedFont(Service::Interface* self) { * Outputs: * 1 : Result of function, 0 on success, otherwise error code */ -void SetAppCpuTimeLimit(Service::Interface* self) { +static void SetAppCpuTimeLimit(Service::Interface* self) { u32* cmd_buff = Kernel::GetCommandBuffer(); u32 value = cmd_buff[1]; u32 percent = cmd_buff[2]; @@ -390,7 +390,7 @@ void SetAppCpuTimeLimit(Service::Interface* self) { * 1 : Result of function, 0 on success, otherwise error code * 2 : System core CPU time percentage */ -void GetAppCpuTimeLimit(Service::Interface* self) { +static void GetAppCpuTimeLimit(Service::Interface* self) { u32* cmd_buff = Kernel::GetCommandBuffer(); u32 value = cmd_buff[1]; diff --git a/src/core/hle/service/cfg/cfg_u.cpp b/src/core/hle/service/cfg/cfg_u.cpp index 4c5eac38..a65da90c 100644 --- a/src/core/hle/service/cfg/cfg_u.cpp +++ b/src/core/hle/service/cfg/cfg_u.cpp @@ -85,7 +85,7 @@ static void GetCountryCodeID(Service::Interface* self) { // The following algorithm will fail if the first country code isn't 0. DEBUG_ASSERT(country_codes[0] == 0); - for (size_t id = 0; id < country_codes.size(); ++id) { + for (u16 id = 0; id < country_codes.size(); ++id) { if (country_codes[id] == country_code) { country_code_id = id; break; diff --git a/src/core/hle/service/dsp_dsp.cpp b/src/core/hle/service/dsp_dsp.cpp index db1e3b5f..0b3603ce 100644 --- a/src/core/hle/service/dsp_dsp.cpp +++ b/src/core/hle/service/dsp_dsp.cpp @@ -34,7 +34,7 @@ void SignalInterrupt() { * 1 : Result of function, 0 on success, otherwise error code * 2 : (inaddr << 1) + 0x1FF40000 (where 0x1FF00000 is the DSP RAM address) */ -void ConvertProcessAddressFromDspDram(Service::Interface* self) { +static void ConvertProcessAddressFromDspDram(Service::Interface* self) { u32* cmd_buff = Kernel::GetCommandBuffer(); u32 addr = cmd_buff[1]; @@ -57,7 +57,7 @@ void ConvertProcessAddressFromDspDram(Service::Interface* self) { * 1 : Result of function, 0 on success, otherwise error code * 2 : Component loaded, 0 on not loaded, 1 on loaded */ -void LoadComponent(Service::Interface* self) { +static void LoadComponent(Service::Interface* self) { u32* cmd_buff = Kernel::GetCommandBuffer(); cmd_buff[1] = 0; // No error @@ -74,7 +74,7 @@ void LoadComponent(Service::Interface* self) { * 1 : Result of function, 0 on success, otherwise error code * 3 : Semaphore event handle */ -void GetSemaphoreEventHandle(Service::Interface* self) { +static void GetSemaphoreEventHandle(Service::Interface* self) { u32* cmd_buff = Kernel::GetCommandBuffer(); cmd_buff[1] = RESULT_SUCCESS.raw; // No error @@ -92,7 +92,7 @@ void GetSemaphoreEventHandle(Service::Interface* self) { * Outputs: * 1 : Result of function, 0 on success, otherwise error code */ -void RegisterInterruptEvents(Service::Interface* self) { +static void RegisterInterruptEvents(Service::Interface* self) { u32* cmd_buff = Kernel::GetCommandBuffer(); auto evt = Kernel::g_handle_table.Get<Kernel::Event>(cmd_buff[4]); @@ -116,7 +116,7 @@ void RegisterInterruptEvents(Service::Interface* self) { * Outputs: * 1 : Result of function, 0 on success, otherwise error code */ -void WriteReg0x10(Service::Interface* self) { +static void WriteReg0x10(Service::Interface* self) { u32* cmd_buff = Kernel::GetCommandBuffer(); SignalInterrupt(); @@ -137,7 +137,7 @@ void WriteReg0x10(Service::Interface* self) { * 0 : Return header * 1 : Result of function, 0 on success, otherwise error code */ -void WriteProcessPipe(Service::Interface* self) { +static void WriteProcessPipe(Service::Interface* self) { u32* cmd_buff = Kernel::GetCommandBuffer(); u32 number = cmd_buff[1]; @@ -162,7 +162,7 @@ void WriteProcessPipe(Service::Interface* self) { * 1 : Result of function, 0 on success, otherwise error code * 2 : Number of bytes read from pipe */ -void ReadPipeIfPossible(Service::Interface* self) { +static void ReadPipeIfPossible(Service::Interface* self) { u32* cmd_buff = Kernel::GetCommandBuffer(); u32 size = cmd_buff[3] & 0xFFFF;// Lower 16 bits are size @@ -200,7 +200,7 @@ void ReadPipeIfPossible(Service::Interface* self) { * Outputs: * 1 : Result of function, 0 on success, otherwise error code */ -void SetSemaphoreMask(Service::Interface* self) { +static void SetSemaphoreMask(Service::Interface* self) { u32* cmd_buff = Kernel::GetCommandBuffer(); u32 mask = cmd_buff[1]; @@ -219,7 +219,7 @@ void SetSemaphoreMask(Service::Interface* self) { * 2 : The headphone status response, 0 = Not using headphones?, * 1 = using headphones? */ -void GetHeadphoneStatus(Service::Interface* self) { +static void GetHeadphoneStatus(Service::Interface* self) { u32* cmd_buff = Kernel::GetCommandBuffer(); cmd_buff[1] = RESULT_SUCCESS.raw; // No error diff --git a/src/core/hle/service/fs/archive.cpp b/src/core/hle/service/fs/archive.cpp index 37bcec21..a69c4f25 100644 --- a/src/core/hle/service/fs/archive.cpp +++ b/src/core/hle/service/fs/archive.cpp @@ -87,8 +87,8 @@ ResultVal<bool> File::SyncRequest() { u32 length = cmd_buff[3]; u32 address = cmd_buff[5]; LOG_TRACE(Service_FS, "Read %s %s: offset=0x%llx length=%d address=0x%x", - GetTypeName().c_str(), GetName().c_str(), offset, length, address); - cmd_buff[2] = backend->Read(offset, length, Memory::GetPointer(address)); + GetTypeName().c_str(), GetName().c_str(), offset, length, address); + cmd_buff[2] = static_cast<u32>(backend->Read(offset, length, Memory::GetPointer(address))); break; } @@ -100,8 +100,8 @@ ResultVal<bool> File::SyncRequest() { u32 flush = cmd_buff[4]; u32 address = cmd_buff[6]; LOG_TRACE(Service_FS, "Write %s %s: offset=0x%llx length=%d address=0x%x, flush=0x%x", - GetTypeName().c_str(), GetName().c_str(), offset, length, address, flush); - cmd_buff[2] = backend->Write(offset, length, flush, Memory::GetPointer(address)); + GetTypeName().c_str(), GetName().c_str(), offset, length, address, flush); + cmd_buff[2] = static_cast<u32>(backend->Write(offset, length, flush, Memory::GetPointer(address))); break; } diff --git a/src/core/hle/service/gsp_gpu.cpp b/src/core/hle/service/gsp_gpu.cpp index dcc1b694..31e61391 100644 --- a/src/core/hle/service/gsp_gpu.cpp +++ b/src/core/hle/service/gsp_gpu.cpp @@ -199,15 +199,22 @@ static void ReadHWRegs(Service::Interface* self) { static void SetBufferSwap(u32 screen_id, const FrameBufferInfo& info) { u32 base_address = 0x400000; if (info.active_fb == 0) { - WriteHWRegs(base_address + 4 * GPU_REG_INDEX(framebuffer_config[screen_id].address_left1), 4, &info.address_left); - WriteHWRegs(base_address + 4 * GPU_REG_INDEX(framebuffer_config[screen_id].address_right1), 4, &info.address_right); + WriteHWRegs(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[screen_id].address_left1)), 4, + &info.address_left); + WriteHWRegs(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[screen_id].address_right1)), 4, + &info.address_right); } else { - WriteHWRegs(base_address + 4 * GPU_REG_INDEX(framebuffer_config[screen_id].address_left2), 4, &info.address_left); - WriteHWRegs(base_address + 4 * GPU_REG_INDEX(framebuffer_config[screen_id].address_right2), 4, &info.address_right); + WriteHWRegs(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[screen_id].address_left2)), 4, + &info.address_left); + WriteHWRegs(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[screen_id].address_right2)), 4, + &info.address_right); } - WriteHWRegs(base_address + 4 * GPU_REG_INDEX(framebuffer_config[screen_id].stride), 4, &info.stride); - WriteHWRegs(base_address + 4 * GPU_REG_INDEX(framebuffer_config[screen_id].color_format), 4, &info.format); - WriteHWRegs(base_address + 4 * GPU_REG_INDEX(framebuffer_config[screen_id].active_fb), 4, &info.shown_fb); + WriteHWRegs(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[screen_id].stride)), 4, + &info.stride); + WriteHWRegs(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[screen_id].color_format)), 4, + &info.format); + WriteHWRegs(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[screen_id].active_fb)), 4, + &info.shown_fb); } /** @@ -346,11 +353,12 @@ static void ExecuteCommand(const Command& command, u32 thread_id) { { auto& params = command.set_command_list_last; - WriteGPURegister(GPU_REG_INDEX(command_processor_config.address), Memory::VirtualToPhysicalAddress(params.address) >> 3); - WriteGPURegister(GPU_REG_INDEX(command_processor_config.size), params.size); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(command_processor_config.address)), + Memory::VirtualToPhysicalAddress(params.address) >> 3); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(command_processor_config.size)), params.size); // TODO: Not sure if we are supposed to always write this .. seems to trigger processing though - WriteGPURegister(GPU_REG_INDEX(command_processor_config.trigger), 1); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(command_processor_config.trigger)), 1); break; } @@ -360,27 +368,33 @@ static void ExecuteCommand(const Command& command, u32 thread_id) { case CommandId::SET_MEMORY_FILL: { auto& params = command.memory_fill; - WriteGPURegister(GPU_REG_INDEX(memory_fill_config[0].address_start), Memory::VirtualToPhysicalAddress(params.start1) >> 3); - WriteGPURegister(GPU_REG_INDEX(memory_fill_config[0].address_end), Memory::VirtualToPhysicalAddress(params.end1) >> 3); - WriteGPURegister(GPU_REG_INDEX(memory_fill_config[0].size), params.end1 - params.start1); - WriteGPURegister(GPU_REG_INDEX(memory_fill_config[0].value), params.value1); - - WriteGPURegister(GPU_REG_INDEX(memory_fill_config[1].address_start), Memory::VirtualToPhysicalAddress(params.start2) >> 3); - WriteGPURegister(GPU_REG_INDEX(memory_fill_config[1].address_end), Memory::VirtualToPhysicalAddress(params.end2) >> 3); - WriteGPURegister(GPU_REG_INDEX(memory_fill_config[1].size), params.end2 - params.start2); - WriteGPURegister(GPU_REG_INDEX(memory_fill_config[1].value), params.value2); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(memory_fill_config[0].address_start)), + Memory::VirtualToPhysicalAddress(params.start1) >> 3); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(memory_fill_config[0].address_end)), + Memory::VirtualToPhysicalAddress(params.end1) >> 3); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(memory_fill_config[0].size)), params.end1 - params.start1); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(memory_fill_config[0].value)), params.value1); + + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(memory_fill_config[1].address_start)), + Memory::VirtualToPhysicalAddress(params.start2) >> 3); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(memory_fill_config[1].address_end)), + Memory::VirtualToPhysicalAddress(params.end2) >> 3); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(memory_fill_config[1].size)), params.end2 - params.start2); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(memory_fill_config[1].value)), params.value2); break; } case CommandId::SET_DISPLAY_TRANSFER: { auto& params = command.image_copy; - WriteGPURegister(GPU_REG_INDEX(display_transfer_config.input_address), Memory::VirtualToPhysicalAddress(params.in_buffer_address) >> 3); - WriteGPURegister(GPU_REG_INDEX(display_transfer_config.output_address), Memory::VirtualToPhysicalAddress(params.out_buffer_address) >> 3); - WriteGPURegister(GPU_REG_INDEX(display_transfer_config.input_size), params.in_buffer_size); - WriteGPURegister(GPU_REG_INDEX(display_transfer_config.output_size), params.out_buffer_size); - WriteGPURegister(GPU_REG_INDEX(display_transfer_config.flags), params.flags); - WriteGPURegister(GPU_REG_INDEX(display_transfer_config.trigger), 1); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.input_address)), + Memory::VirtualToPhysicalAddress(params.in_buffer_address) >> 3); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.output_address)), + Memory::VirtualToPhysicalAddress(params.out_buffer_address) >> 3); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.input_size)), params.in_buffer_size); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.output_size)), params.out_buffer_size); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.flags)), params.flags); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.trigger)), 1); break; } @@ -388,14 +402,16 @@ static void ExecuteCommand(const Command& command, u32 thread_id) { case CommandId::SET_TEXTURE_COPY: { auto& params = command.image_copy; - WriteGPURegister(GPU_REG_INDEX(display_transfer_config.input_address), Memory::VirtualToPhysicalAddress(params.in_buffer_address) >> 3); - WriteGPURegister(GPU_REG_INDEX(display_transfer_config.output_address), Memory::VirtualToPhysicalAddress(params.out_buffer_address) >> 3); - WriteGPURegister(GPU_REG_INDEX(display_transfer_config.input_size), params.in_buffer_size); - WriteGPURegister(GPU_REG_INDEX(display_transfer_config.output_size), params.out_buffer_size); - WriteGPURegister(GPU_REG_INDEX(display_transfer_config.flags), params.flags); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.input_address)), + Memory::VirtualToPhysicalAddress(params.in_buffer_address) >> 3); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.output_address)), + Memory::VirtualToPhysicalAddress(params.out_buffer_address) >> 3); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.input_size)), params.in_buffer_size); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.output_size)), params.out_buffer_size); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.flags)), params.flags); // TODO: Should this register be set to 1 or should instead its value be OR-ed with 1? - WriteGPURegister(GPU_REG_INDEX(display_transfer_config.trigger), 1); + WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.trigger)), 1); break; } diff --git a/src/core/hle/service/service.cpp b/src/core/hle/service/service.cpp index e0979ea5..5dce8068 100644 --- a/src/core/hle/service/service.cpp +++ b/src/core/hle/service/service.cpp @@ -71,6 +71,7 @@ static void AddService(Interface* interface) { /// Initialize ServiceManager void Init() { AddNamedPort(new SRV::Interface); + AddNamedPort(new ERR_F::Interface); AddService(new AC_U::Interface); AddService(new ACT_U::Interface); @@ -90,7 +91,6 @@ void Init() { AddService(new CFG_U::Interface); AddService(new CSND_SND::Interface); AddService(new DSP_DSP::Interface); - AddService(new ERR_F::Interface); AddService(new FRD_A::Interface); AddService(new FRD_U::Interface); AddService(new FS::FSUserInterface); diff --git a/src/core/hle/shared_page.cpp b/src/core/hle/shared_page.cpp index bc625416..568dad68 100644 --- a/src/core/hle/shared_page.cpp +++ b/src/core/hle/shared_page.cpp @@ -8,6 +8,7 @@ #include "core/core.h" #include "core/mem_map.h" #include "core/hle/config_mem.h" +#include "core/hle/shared_page.h" //////////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/src/core/hw/gpu.h b/src/core/hw/gpu.h index 7c3a17ee..9fd694f6 100644 --- a/src/core/hw/gpu.h +++ b/src/core/hw/gpu.h @@ -53,6 +53,7 @@ struct Regs { "Structure size and register block length don't match") #endif + // All of those formats are described in reverse byte order, since the 3DS is little-endian. enum class PixelFormat : u32 { RGBA8 = 0, RGB8 = 1, @@ -61,6 +62,24 @@ struct Regs { RGBA4 = 4, }; + /** + * Returns the number of bytes per pixel. + */ + static int BytesPerPixel(PixelFormat format) { + switch (format) { + case PixelFormat::RGBA8: + return 4; + case PixelFormat::RGB8: + return 3; + case PixelFormat::RGB565: + case PixelFormat::RGB5A1: + case PixelFormat::RGBA4: + return 2; + default: + UNIMPLEMENTED(); + } + } + INSERT_PADDING_WORDS(0x4); struct { diff --git a/src/core/loader/loader.cpp b/src/core/loader/loader.cpp index 94dcc50f..aca09b37 100644 --- a/src/core/loader/loader.cpp +++ b/src/core/loader/loader.cpp @@ -86,8 +86,10 @@ static const char* GetFileTypeString(FileType type) { return "raw"; case FileType::Error: case FileType::Unknown: - return "unknown"; + break; } + + return "unknown"; } ResultStatus LoadFile(const std::string& filename) { diff --git a/src/video_core/gpu_debugger.h b/src/video_core/gpu_debugger.h index c2c89899..03641d93 100644 --- a/src/video_core/gpu_debugger.h +++ b/src/video_core/gpu_debugger.h @@ -64,7 +64,7 @@ public: memcpy(&cmd, command_data, sizeof(GSP_GPU::Command)); ForEachObserver([this](DebuggerObserver* observer) { - observer->GXCommandProcessed(this->gx_command_history.size()); + observer->GXCommandProcessed(static_cast<int>(this->gx_command_history.size())); } ); } diff --git a/src/video_core/math.h b/src/video_core/math.h index c176b225..f9a82265 100644 --- a/src/video_core/math.h +++ b/src/video_core/math.h @@ -631,7 +631,7 @@ static inline Vec4<T> MakeVec(const Vec3<T>& xyz, const T& w) } template<typename T> -static inline Vec4<T> MakeVec(const T& x, const Vec2<T>& yzw) +static inline Vec4<T> MakeVec(const T& x, const Vec3<T>& yzw) { return MakeVec(x, yzw[0], yzw[1], yzw[2]); } diff --git a/src/video_core/renderer_opengl/renderer_opengl.cpp b/src/video_core/renderer_opengl/renderer_opengl.cpp index 735c0cf4..27269517 100644 --- a/src/video_core/renderer_opengl/renderer_opengl.cpp +++ b/src/video_core/renderer_opengl/renderer_opengl.cpp @@ -61,15 +61,13 @@ void RendererOpenGL::SwapBuffers() { for(int i : {0, 1}) { const auto& framebuffer = GPU::g_regs.framebuffer_config[i]; - if (textures[i].width != (GLsizei)framebuffer.width || textures[i].height != (GLsizei)framebuffer.height) { + if (textures[i].width != (GLsizei)framebuffer.width || + textures[i].height != (GLsizei)framebuffer.height || + textures[i].format != framebuffer.color_format) { // Reallocate texture if the framebuffer size has changed. // This is expected to not happen very often and hence should not be a // performance problem. - glBindTexture(GL_TEXTURE_2D, textures[i].handle); - glTexImage2D(GL_TEXTURE_2D, 0, GL_RGB, framebuffer.width, framebuffer.height, 0, - GL_BGR, GL_UNSIGNED_BYTE, nullptr); - textures[i].width = framebuffer.width; - textures[i].height = framebuffer.height; + ConfigureFramebufferTexture(textures[i], framebuffer); } LoadFBToActiveGLTexture(GPU::g_regs.framebuffer_config[i], textures[i]); @@ -98,13 +96,12 @@ void RendererOpenGL::LoadFBToActiveGLTexture(const GPU::Regs::FramebufferConfig& const u8* framebuffer_data = Memory::GetPointer(framebuffer_vaddr); - // TODO: Handle other pixel formats - ASSERT_MSG(framebuffer.color_format == GPU::Regs::PixelFormat::RGB8, - "Unsupported 3DS pixel format."); + int bpp = GPU::Regs::BytesPerPixel(framebuffer.color_format); + size_t pixel_stride = framebuffer.stride / bpp; - size_t pixel_stride = framebuffer.stride / 3; // OpenGL only supports specifying a stride in units of pixels, not bytes, unfortunately - ASSERT(pixel_stride * 3 == framebuffer.stride); + ASSERT(pixel_stride * bpp == framebuffer.stride); + // Ensure no bad interactions with GL_UNPACK_ALIGNMENT, which by default // only allows rows to have a memory alignement of 4. ASSERT(pixel_stride % 4 == 0); @@ -118,7 +115,7 @@ void RendererOpenGL::LoadFBToActiveGLTexture(const GPU::Regs::FramebufferConfig& // TODO: Applications could theoretically crash Citra here by specifying too large // framebuffer sizes. We should make sure that this cannot happen. glTexSubImage2D(GL_TEXTURE_2D, 0, 0, 0, framebuffer.width, framebuffer.height, - GL_BGR, GL_UNSIGNED_BYTE, framebuffer_data); + texture.gl_format, texture.gl_type, framebuffer_data); glPixelStorei(GL_UNPACK_ROW_LENGTH, 0); @@ -171,6 +168,59 @@ void RendererOpenGL::InitOpenGLObjects() { glBindTexture(GL_TEXTURE_2D, 0); } +void RendererOpenGL::ConfigureFramebufferTexture(TextureInfo& texture, + const GPU::Regs::FramebufferConfig& framebuffer) { + GPU::Regs::PixelFormat format = framebuffer.color_format; + GLint internal_format; + + texture.format = format; + texture.width = framebuffer.width; + texture.height = framebuffer.height; + + switch (format) { + case GPU::Regs::PixelFormat::RGBA8: + internal_format = GL_RGBA; + texture.gl_format = GL_RGBA; + texture.gl_type = GL_UNSIGNED_INT_8_8_8_8; + break; + + case GPU::Regs::PixelFormat::RGB8: + // This pixel format uses BGR since GL_UNSIGNED_BYTE specifies byte-order, unlike every + // specific OpenGL type used in this function using native-endian (that is, little-endian + // mostly everywhere) for words or half-words. + // TODO: check how those behave on big-endian processors. + internal_format = GL_RGB; + texture.gl_format = GL_BGR; + texture.gl_type = GL_UNSIGNED_BYTE; + break; + + case GPU::Regs::PixelFormat::RGB565: + internal_format = GL_RGB; + texture.gl_format = GL_RGB; + texture.gl_type = GL_UNSIGNED_SHORT_5_6_5; + break; + + case GPU::Regs::PixelFormat::RGB5A1: + internal_format = GL_RGBA; + texture.gl_format = GL_RGBA; + texture.gl_type = GL_UNSIGNED_SHORT_5_5_5_1; + break; + + case GPU::Regs::PixelFormat::RGBA4: + internal_format = GL_RGBA; + texture.gl_format = GL_RGBA; + texture.gl_type = GL_UNSIGNED_SHORT_4_4_4_4; + break; + + default: + UNIMPLEMENTED(); + } + + glBindTexture(GL_TEXTURE_2D, texture.handle); + glTexImage2D(GL_TEXTURE_2D, 0, internal_format, texture.width, texture.height, 0, + texture.gl_format, texture.gl_type, nullptr); +} + /** * Draws a single texture to the emulator window, rotating the texture to correct for the 3DS's LCD rotation. */ diff --git a/src/video_core/renderer_opengl/renderer_opengl.h b/src/video_core/renderer_opengl/renderer_opengl.h index cf78c1e7..bcabab55 100644 --- a/src/video_core/renderer_opengl/renderer_opengl.h +++ b/src/video_core/renderer_opengl/renderer_opengl.h @@ -43,9 +43,14 @@ private: GLuint handle; GLsizei width; GLsizei height; + GPU::Regs::PixelFormat format; + GLenum gl_format; + GLenum gl_type; }; void InitOpenGLObjects(); + static void ConfigureFramebufferTexture(TextureInfo& texture, + const GPU::Regs::FramebufferConfig& framebuffer); void DrawScreens(); void DrawSingleScreenRotated(const TextureInfo& texture, float x, float y, float w, float h); void UpdateFramerate(); diff --git a/src/video_core/vertex_shader.cpp b/src/video_core/vertex_shader.cpp index 0bd52231..80935a50 100644 --- a/src/video_core/vertex_shader.cpp +++ b/src/video_core/vertex_shader.cpp @@ -252,7 +252,7 @@ static void ProcessShaderCode(VertexShaderState& state) { // TODO: Be stable against division by zero! // TODO: I think this might be wrong... we should only use one component here - dest[i] = float24::FromFloat32(1.0 / src1[i].ToFloat32()); + dest[i] = float24::FromFloat32(1.0f / src1[i].ToFloat32()); } break; @@ -267,7 +267,7 @@ static void ProcessShaderCode(VertexShaderState& state) { // TODO: Be stable against division by zero! // TODO: I think this might be wrong... we should only use one component here - dest[i] = float24::FromFloat32(1.0 / sqrt(src1[i].ToFloat32())); + dest[i] = float24::FromFloat32(1.0f / sqrt(src1[i].ToFloat32())); } break; |