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| author |  bunnei <bunneidev@gmail.com> | 2015-04-06 15:06:07 -0400 |
|---|---|---|
| committer | bunnei <bunneidev@gmail.com> | 2015-04-06 15:06:07 -0400 |
| commit | 14dcd986535c681601d6f255899157aff021a5d2 (patch) | |
| tree | fb35f0b8444122438dcdf41b4a3b0bf32e4d7d29 /src/core/arm/dyncom/arm_dyncom_interpreter.cpp | |
| parent | 8d7a77a1d4e8c7d46976bf025031f454c51ef9c1 (diff) | |
| parent | 8004d35ea163b621ea3f3d4333f2c58ec926d7c9 (diff) | |
Merge pull request #685 from lioncash/cpregs
dyncom: Set the MPCore CP15 register reset values on initialization.
Diffstat (limited to 'src/core/arm/dyncom/arm_dyncom_interpreter.cpp')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 8b1232c6..65fe8a05 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -3700,7 +3700,6 @@ unsigned InterpreterMainLoop(ARMul_State* state) { #define OPCODE_1 inst_cream->opcode_1 #define OPCODE_2 inst_cream->opcode_2 #define CRm inst_cream->crm - #define CP15_REG(n) cpu->CP15[CP15(n)] #define RD cpu->Reg[inst_cream->Rd] #define RD2 cpu->Reg[inst_cream->Rd + 1] #define RN cpu->Reg[inst_cream->Rn] |